Alternatives and similar repositories for LLM4IC

Users that are interested in LLM4IC are comparing it to the libraries listed below

• hkust-zhiyao / RTLLM
  An open-source benchmark for generating design RTL with natural language
  ☆121Updated 8 months ago
• shailja-thakur / VGen
  ☆171Updated 9 months ago
• hkust-zhiyao / RTL-Coder
  A new LLM solution for RTL code generation, achieving state-of-the-art performance in non-commercial solutions and outperforming GPT-3.5.
  ☆210Updated 5 months ago
• Thinklab-SJTU / Awesome-LLM4EDA
  ☆217Updated last year
• UIUC-ChenLab / Chrysalis-HLS
  ☆14Updated 10 months ago
• aichipdesign / chipgptft
  Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)
  ☆43Updated 7 months ago
• JBlocklove / LLMs-for-EDA-Tutorial
  ☆52Updated last month
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆52Updated last month
• scale-lab / BACS
  Benchmarks for Approximate Circuit Synthesis
  ☆16Updated 4 years ago
• Entropy-xcy / sns
  ☆18Updated 2 years ago
• NVlabs / verilog-eval
  Verilog evaluation benchmark for large language model
  ☆288Updated 5 months ago
• hkust-zhiyao / AssertLLM
  Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
  ☆34Updated 8 months ago
• NVlabs / CircuitOps
  ☆86Updated 3 weeks ago
• NVlabs / INSTA
  ☆77Updated 3 weeks ago
• HKUSTGZ-MICS-LYU / FlattenRTL
  This is a python repo for flattening Verilog
  ☆18Updated 2 months ago
• GATECH-EIC / mg-verilog
  ☆46Updated 9 months ago
• magicYang1573 / llm-hardware-test-generation
  ☆31Updated last year
• yaoxufeng / RTLRewriter-Bench
  ☆34Updated last year
• VeriGOOD-ML / public
  ☆60Updated 2 months ago
• laiyao1 / ArithTreeRL
  The release for paper "Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs"
  ☆13Updated 9 months ago
• OpenROAD-Assistant / EDA-Corpus
  Datasets for EDA LLM research
  ☆30Updated 6 months ago
• spcl / rapidchiplet
  A toolchain for rapid design space exploration of chiplet architectures
  ☆53Updated 2 months ago
• NTU-LaDS-II / FAN_ATPG
  FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
  ☆92Updated 2 weeks ago
• SJTU-ECTL / GOMIL
  GOMIL: Global Optimization of Multiplier by Integer Linear Programming
  ☆13Updated 3 years ago
• IPRC-DIP / CodeV
  ☆44Updated last month
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆59Updated last week
• UT-LCA / ML4Accel-Dataset
  Dataset for ML-guided Accelerator Design
  ☆37Updated 7 months ago
• ai4eda / awesome-AI4EDA
  This repo awesome-AI4EDA contains the source for the webpage: https://ai4eda.github.io, which is a curated paper list of awesome AI for E…
  ☆163Updated last month
• UCLA-VAST / GNN-DSE
  DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"
  ☆40Updated last year
• magical-eda / OpenSAR
  ☆15Updated 3 years ago