Alternatives and similar repositories for LLM4IC

Users that are interested in LLM4IC are comparing it to the libraries listed below

• UIUC-ChenLab / Chrysalis-HLS
  ☆14Updated last year
• aichipdesign / chipgptft
  Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)
  ☆48Updated 9 months ago
• hkust-zhiyao / RTLLM
  An open-source benchmark for generating design RTL with natural language
  ☆131Updated 10 months ago
• shailja-thakur / VGen
  ☆183Updated 11 months ago
• JBlocklove / LLMs-for-EDA-Tutorial
  ☆53Updated 3 months ago
• hkust-zhiyao / AssertLLM
  Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
  ☆38Updated 10 months ago
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆54Updated 3 months ago
• hkust-zhiyao / RTL-Coder
  A new LLM solution for RTL code generation, achieving state-of-the-art performance in non-commercial solutions and outperforming GPT-3.5.
  ☆225Updated 7 months ago
• Thinklab-SJTU / Awesome-LLM4EDA
  ☆229Updated last year
• Entropy-xcy / sns
  ☆19Updated 2 years ago
• HKUSTGZ-MICS-LYU / FlattenRTL
  This is a python repo for flattening Verilog
  ☆19Updated 4 months ago
• AutoBench / AutoBench
  ☆28Updated 5 months ago
• NVlabs / RTLFixer
  Fix syntax errors of LLM-generated RTL
  ☆37Updated last year
• magicYang1573 / llm-hardware-test-generation
  ☆32Updated last year
• GATECH-EIC / mg-verilog
  ☆47Updated 11 months ago
• yaoxufeng / RTLRewriter-Bench
  ☆37Updated last year
• spcl / rapidchiplet
  A toolchain for rapid design space exploration of chiplet architectures
  ☆59Updated 2 months ago
• NVlabs / CircuitOps
  ☆91Updated 3 months ago
• hkust-zhiyao / CircuitFusion
  CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)
  ☆24Updated 5 months ago
• OpenROAD-Assistant / EDA-Corpus
  Datasets for EDA LLM research
  ☆33Updated 8 months ago
• IPRC-DIP / CodeV
  ☆48Updated 3 weeks ago
• cornell-zhang / HOGA
  Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits
  ☆31Updated last year
• magical-eda / OpenSAR
  ☆16Updated 3 years ago
• aichipdesign / chipgptv
  Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation (ICCAD 2024)
  ☆27Updated 3 months ago
• laiyao1 / ArithTreeRL
  The release for paper "Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs"
  ☆14Updated 11 months ago
• bsc-loca / sauria
  SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…
  ☆58Updated 11 months ago
• UT-LCA / ML4Accel-Dataset
  Dataset for ML-guided Accelerator Design
  ☆38Updated 10 months ago
• ChatDesignVerification / GenBen
  Generative Benchmark for LLM-Aided Hardware Design
  ☆25Updated 3 months ago
• Picrew / EDA_LLM
  Papers on LLM4EDA from 2023 and 2024
  ☆43Updated last year
• lamda-bbo / Open3DBench
  Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".
  ☆59Updated 3 months ago