siliconcompiler / logik
A configurable RTL to bitstream FPGA toolchain
☆26Updated 3 weeks ago
Alternatives and similar repositories for logik:
Users that are interested in logik are comparing it to the libraries listed below
- A configurable and approachable tool for FPGA debugging and rapid prototyping.☆135Updated 2 weeks ago
- Minimax: a Compressed-First, Microcoded RISC-V CPU☆210Updated last year
- SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.☆442Updated last month
- FOSS Flow For FPGA☆385Updated 3 months ago
- Communication framework for RTL simulation and emulation.☆283Updated last month
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆649Updated this week
- VHDL synthesis (based on ghdl)☆334Updated last week
- List of FPGA Lattice boards using open tools☆321Updated 2 months ago
- CoreScore☆149Updated 3 months ago
- CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…☆357Updated this week
- Silicon Layout Wizard☆168Updated this week
- ☆264Updated this week
- 🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).☆182Updated 3 months ago
- Example designs showing different ways to use F4PGA toolchains.☆275Updated last year
- Universal Memory Interface (UMI)☆145Updated 3 weeks ago
- My own FPGA architecture simulated in VHDL, realized with 7400-logic on PCB.☆42Updated last year
- Design digital circuits in C. Simulate really fast with a regular compiler.☆173Updated 2 years ago
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design☆520Updated last week
- A modern and open-source cross-platform software for chips reverse engineering.☆259Updated 5 months ago
- Example LED blinking project for your FPGA dev board of choice☆175Updated 2 months ago
- CORE-V Family of RISC-V Cores☆254Updated 2 months ago
- 😎 A curated list of awesome RISC-V implementations☆135Updated 2 years ago
- Modular hardware build system☆979Updated this week
- Small footprint and configurable Ethernet core☆236Updated this week
- A list of resources related to the open-source FPGA projects☆405Updated 2 years ago
- An attempt to recreate the RP2040 PIO in an FPGA☆295Updated 10 months ago
- ☆281Updated last month
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆281Updated 2 months ago
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆103Updated 9 months ago
- Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.☆322Updated 2 months ago