Alternatives and similar repositories for kianRiscV

Users that are interested in kianRiscV are comparing it to the libraries listed below

• openhwgroup / cvw
  CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…
  ☆458Updated this week
• riscv / learn
  Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.
  ☆1,296Updated 2 months ago
• Wren6991 / Hazard3
  3-stage RV32IMACZb* processor with debug
  ☆973Updated 3 weeks ago
• stevehoover / LF-Building-a-RISC-V-CPU-Core
  ☆439Updated 10 months ago
• 0BAB1 / HOLY_CORE_COURSE
  Learn how to build our own RV32I(M) core, verify it and actually use it. From scratch & with more than 200 pages of detailed tutorial wit…
  ☆319Updated this week
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,723Updated 3 weeks ago
• projf / projf-explore
  Project F brings FPGAs to life with exciting open-source designs you can build on.
  ☆739Updated 11 months ago
• YosysHQ / oss-cad-suite-build
  Multi-platform nightly builds of open source digital design and verification tools
  ☆1,311Updated this week
• mikeroyal / RISC-V-Guide
  RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-…
  ☆629Updated 2 years ago
• stnolting / neorv32
  🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…
  ☆1,952Updated this week
• JulianKemmerer / PipelineC
  A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …
  ☆694Updated this week
• hughperkins / VeriGPU
  OpenSource GPU, in Verilog, loosely based on RISC-V ISA
  ☆1,176Updated last year
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆1,166Updated 4 years ago
• BrunoLevy / learn-fpga
  Learning FPGA, yosys, nextpnr, and RISC-V
  ☆3,360Updated last month
• litex-hub / linux-on-litex-vexriscv
  Linux on LiteX-VexRiscv
  ☆677Updated last week
• open-logic / open-logic
  Open Logic FPGA Standard Library
  ☆841Updated this week
• laforest / FPGADesignElements
  A self-contained online book containing a library of FPGA design modules and related coding/design guides.
  ☆459Updated last year
• os-fpga / open-source-fpga-resource
  A list of resources related to the open-source FPGA projects
  ☆435Updated 3 years ago
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,496Updated last month
• trabucayre / openFPGALoader
  Universal utility for programming FPGA
  ☆1,510Updated last week
• siliconcompiler / siliconcompiler
  Modular hardware build system
  ☆1,119Updated this week
• YosysHQ / apicula
  Project Apicula 🐝: bitstream documentation for Gowin FPGAs
  ☆613Updated this week
• splinedrive / lets_build_a_compiler_for_riscv
  A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw
  ☆122Updated 3 years ago
• zeroasiccorp / switchboard
  Communication framework for RTL simulation and emulation.
  ☆307Updated 3 weeks ago
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,144Updated 2 weeks ago
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,970Updated 3 weeks ago
• siriusm46 / Sources-for-FPGA-and-VLSI-Design
  If you are interested in Digital Hardware Design and/or interested in chip and VLSI design, you may like this repo!
  ☆47Updated 5 months ago
• suryakantamangaraj / AwesomeRISC-VResources
  It contains a curated list of awesome RISC-V Resources.
  ☆287Updated 11 months ago
• sergeykhbr / riscv_vhdl
  Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
  ☆678Updated 5 months ago
• 0BAB1 / BRH_Tutorials
  [BRH YT CHANNEL] This repo contains all the code and ressources you need for the Zynq tutorials, ready to copy and paste.
  ☆67Updated 6 months ago