A configurable and approachable tool for FPGA debugging and rapid prototyping.
☆150Mar 29, 2026Updated 3 months ago
Alternatives and similar repositories for manta
Users that are interested in manta are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Fabric generator and CAD tools graphical frontend☆18Aug 5, 2025Updated 11 months ago
- [MIGRATED to https://codeberg.org/prjunnamed/prjcombine/] An FPGA reverse engineering and documentation project☆65Mar 12, 2026Updated 4 months ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Dec 3, 2024Updated last year
- System on Chip toolkit for Amaranth HDL☆101May 23, 2026Updated 2 months ago
- Raptor end-to-end FPGA Compiler and GUI☆99Dec 11, 2024Updated last year
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- WAL enables programmable waveform analysis.☆182May 31, 2026Updated last month
- ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…☆35Sep 30, 2020Updated 5 years ago
- PypelineC: A hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compi…☆738Updated this week
- An easy-to-use, silicon-proven (e)FPGA generator with an integrated CAD toolchain 🏗️☆280Updated this week
- Yosys plugin for logic locking and supply-chain security☆24Apr 5, 2025Updated last year
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆36Feb 23, 2025Updated last year
- HDMI Expansion Modules compatible with the Pmod standard☆12Apr 5, 2018Updated 8 years ago
- ☆23Oct 10, 2023Updated 2 years ago
- assorted library of utility cores for amaranth HDL☆105Sep 17, 2024Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆121Jun 18, 2026Updated last month
- A modern hardware definition language and toolchain based on Python☆2,056Jul 16, 2026Updated last week
- FOSS Flow For FPGA☆446Jan 6, 2025Updated last year
- Fearless hardware design☆205Updated this week
- fcapz: Open-source, vendor-agnostic full-featured FPGA debug cores. Embedded Logic analyzer, Embedded I/O and Embedded JTAG-AXI☆99Jul 19, 2026Updated last week
- Universal utility for programming FPGA☆1,690Updated this week
- The first-ever opensource soft core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers. With sta…☆77Jul 11, 2026Updated 2 weeks ago
- Take control of your Colorlight FPGA board with LiteX/LiteEth :)☆113Aug 30, 2023Updated 2 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- riffpga -- write FPGA bitstreams through a USB drive, get USB serial and dynamic clocking in a platform independent way☆75Jun 13, 2026Updated last month
- ☆33Jan 7, 2025Updated last year
- Fixed-point math library with VHDL, Python and MATLAB support☆39Apr 13, 2026Updated 3 months ago
- A Python package to use FPGA development tools programmatically.☆148Mar 22, 2025Updated last year
- PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers☆76Apr 24, 2026Updated 3 months ago
- Open source RTL simulation acceleration on commodity hardware☆35Apr 13, 2023Updated 3 years ago
- [MIGRATED to https://codeberg.org/prjunnamed/prjunnamed] End-to-end synthesis and P&R toolchain☆95Mar 12, 2026Updated 4 months ago
- BRISKI ( Barrel RISC-V for Kilo-core Implementations ) is a fast and compact RISC-V barrel processor core that emphasize high throughput …☆31Jul 6, 2026Updated 2 weeks ago
- Iron: selectively turn RISC-V binaries into hardware☆23Jun 8, 2023Updated 3 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated 2 years ago
- Convert an image to a GDS format for inclusion in a zerotoasic project☆19Jun 16, 2022Updated 4 years ago
- Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.☆174Jun 24, 2021Updated 5 years ago
- VS Code extension for SystemVerilog design navigation, RTL tracing, schematic viewer, and waveform integration☆47Updated this week
- Small footprint and configurable embedded FPGA logic analyzer☆206Updated this week
- [Moved to Codeberg] Another size-optimized RISC-V CPU for your consideration.☆61May 10, 2026Updated 2 months ago
- Awesome projects using the Amaranth HDL☆20Feb 6, 2025Updated last year