A configurable and approachable tool for FPGA debugging and rapid prototyping.
☆147Mar 29, 2026Updated last month
Alternatives and similar repositories for manta
Users that are interested in manta are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Fabric generator and CAD tools graphical frontend☆18Aug 5, 2025Updated 9 months ago
- [MIGRATED to https://codeberg.org/prjunnamed/prjcombine/] An FPGA reverse engineering and documentation project☆66Mar 12, 2026Updated last month
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Dec 3, 2024Updated last year
- An easy-to-use, silicon-proven (e)FPGA generator with an integrated CAD toolchain 🏗️☆252Apr 27, 2026Updated last week
- System on Chip toolkit for Amaranth HDL☆100Mar 3, 2026Updated 2 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Raptor end-to-end FPGA Compiler and GUI☆97Dec 11, 2024Updated last year
- WAL enables programmable waveform analysis.☆177Nov 10, 2025Updated 5 months ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆37Feb 23, 2025Updated last year
- ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…☆35Sep 30, 2020Updated 5 years ago
- VS Code extension for SystemVerilog design navigation and RTL tracing. Seamlessly integrates with waveform viewer for post-simulation deb…☆37Nov 6, 2025Updated 6 months ago
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆717Updated this week
- Yosys plugin for logic locking and supply-chain security☆23Apr 5, 2025Updated last year
- ☆23Oct 10, 2023Updated 2 years ago
- HDMI Expansion Modules compatible with the Pmod standard☆11Apr 5, 2018Updated 8 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- assorted library of utility cores for amaranth HDL☆105Sep 17, 2024Updated last year
- A modern hardware definition language and toolchain based on Python☆2,005Apr 28, 2026Updated last week
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆114Apr 22, 2026Updated 2 weeks ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- Universal utility for programming FPGA☆1,615Apr 26, 2026Updated last week
- FOSS Flow For FPGA☆435Jan 6, 2025Updated last year
- Fearless hardware design☆201Aug 20, 2025Updated 8 months ago
- ☆20Apr 8, 2026Updated 3 weeks ago
- riffpga -- write FPGA bitstreams through a USB drive, get USB serial and dynamic clocking in a platform independent way☆74Feb 27, 2025Updated last year
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Take control of your Colorlight FPGA board with LiteX/LiteEth :)☆112Aug 30, 2023Updated 2 years ago
- ☆33Jan 7, 2025Updated last year
- A Python package to use FPGA development tools programmatically.☆146Mar 22, 2025Updated last year
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆96Updated this week
- Open-source PDK version manager☆47Apr 23, 2026Updated last week
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆96Apr 10, 2026Updated 3 weeks ago
- Control and status register code generator toolchain☆192Apr 16, 2026Updated 2 weeks ago
- Fixed-point math library with VHDL, Python and MATLAB support☆39Apr 13, 2026Updated 3 weeks ago
- [MIGRATED to https://codeberg.org/prjunnamed/prjunnamed] End-to-end synthesis and P&R toolchain☆94Mar 12, 2026Updated last month
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- BRISKI ( Barrel RISC-V for Kilo-core Implementations ) is a fast and compact RISC-V barrel processor core that emphasize high throughput …☆31Nov 28, 2025Updated 5 months ago
- Open source RTL simulation acceleration on commodity hardware☆35Apr 13, 2023Updated 3 years ago
- Iron: selectively turn RISC-V binaries into hardware☆23Jun 8, 2023Updated 2 years ago
- Fixed point math library for SystemVerilog☆43Nov 14, 2024Updated last year
- Package manager and build abstraction tool for FPGA/ASIC development☆1,410Feb 13, 2026Updated 2 months ago
- Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.☆168Jun 24, 2021Updated 4 years ago
- Awesome projects using the Amaranth HDL☆20Feb 6, 2025Updated last year