FPGA synthesis tool
☆145Sep 22, 2026Updated this week
Alternatives and similar repositories for wildebeest
Users that are interested in wildebeest are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆23Aug 31, 2026Updated 3 weeks ago
- Yosys plugin for logic locking and supply-chain security☆25Apr 5, 2025Updated last year
- Digital logic benchmark suite☆88Updated this week
- ☆44Updated this week
- Netlist API (and more) for EDA flow development☆163Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Making cocotb testbenches that bit easier☆42Feb 28, 2026Updated 6 months ago
- ☆39Sep 10, 2026Updated 2 weeks ago
- wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.☆146Aug 23, 2026Updated last month
- An easy-to-use, silicon-proven (e)FPGA generator with an integrated CAD toolchain 🏗️☆300Updated this week
- [MIGRATED to https://codeberg.org/prjunnamed/prjunnamed] End-to-end synthesis and P&R toolchain☆95Mar 12, 2026Updated 6 months ago
- RTLMeter benchmark suite☆33Updated this week
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆110Aug 31, 2026Updated 3 weeks ago
- HDL-first mixed-signal co-simulation: embed ngspice circuits in Verilog through VPI☆71Updated this week
- A programming language for writing constraint-based integrated circuit layout generators☆17Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek sec…☆1,362Updated this week
- ☆121Jun 14, 2026Updated 3 months ago
- Demo: how to create a custom EBRICK☆30Nov 20, 2024Updated last year
- Elements Software Development Kit☆13Jan 8, 2026Updated 8 months ago
- SystemVerilog file list pruner☆19Sep 14, 2026Updated last week
- Fully defined liberty (std. cells in VLSI) data structure, efficient parser & formatter☆29Feb 24, 2026Updated 7 months ago
- A configurable RTL to bitstream FPGA toolchain☆64Sep 4, 2026Updated 2 weeks ago
- Fault Injection Automatic Test Equipment☆17Nov 22, 2021Updated 4 years ago
- nscscc2024，HPU河南理工大学参赛作品，两仪处理器☆13Aug 24, 2024Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- nn2FPGA converts ONNX models into FPGA dataflow accelerators with seamless ONNX Runtime integration.☆24Sep 15, 2026Updated last week
- ngspicejs script that finds new LC oscillator topologies☆16Jul 17, 2026Updated 2 months ago
- Example project for the BRS-100-GW1NR9 FPGA development board.☆19Sep 9, 2026Updated 2 weeks ago
- Library of FPGA architectures☆33Sep 4, 2026Updated 2 weeks ago
- Open source FPGA silicon☆347Sep 5, 2026Updated 2 weeks ago
- Full Speed USB DFU interface for FPGA and ASIC designs☆21Mar 10, 2024Updated 2 years ago
- [MIGRATED to https://codeberg.org/prjunnamed/prjcombine/] An FPGA reverse engineering and documentation project☆66Mar 12, 2026Updated 6 months ago
- Analog Circuit Simulator☆26Sep 6, 2024Updated 2 years ago
- Build mini linux for your own RISC-V emulator!☆25Sep 11, 2024Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- fakeram generator for use by researchers who do not have access to commercial ram generators☆45Jan 13, 2023Updated 3 years ago
- RISC-V out-of-order core for education and research purposes☆99Updated this week
- A new Hardware Design Language that keeps you in the driver's seat☆126Updated this week
- Open-source RTL logic simulator with CUDA acceleration☆300Sep 30, 2025Updated 11 months ago
- FPGA tool performance profiling☆108Feb 24, 2024Updated 2 years ago
- ☆24Jul 29, 2025Updated last year
- ASIC implementation flow infrastructure, successor to OpenLane☆555Updated this week