Alternatives and similar repositories for Cookabarra:

Users that are interested in Cookabarra are comparing it to the libraries listed below

• dpretet / axi-crossbar
  An AXI4 crossbar implementation in SystemVerilog
  ☆143Updated last week
• RV-BOSC / OpenNoC
  ☆144Updated 2 weeks ago
• OSCPU / ysyxSoC
  ☆85Updated 2 months ago
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆145Updated 2 years ago
• lizhirui / DreamCore
  ☆64Updated 2 years ago
• OpenXiangShan / XS-Verilog-Library
  ☆41Updated 2 years ago
• jijingg / Spinal-bootcamp
  SpinalHDL-tutorial based on Jupyter Notebook
  ☆132Updated 10 months ago
• risclite / SuperScalar-RISCV-CPU
  SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.
  ☆212Updated 4 years ago
• kaitoukito / Integrated-Circuit-Textbooks
  Collect some IC textbooks for learning.
  ☆133Updated 2 years ago
• OSCPU-Zhoushan / Zhoushan
  Open Source Chip Project by University (OSCPU) - Zhoushan Core
  ☆50Updated 2 years ago
• lizhirui / AXI-SDCard-High-Speed-Controller
  A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)
  ☆116Updated 2 years ago
• freecores / dma_axi
  AXI DMA 32 / 64 bits
  ☆111Updated 10 years ago
• microdynamics-cpu / tree-core-ide
  The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…
  ☆103Updated 2 years ago
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆42Updated 4 years ago
• mmxsrup / axi4-interface
  AXI4 and AXI4-Lite interface definitions
  ☆92Updated 4 years ago
• zion-group / VerilogCodingStyle
  ☆63Updated 4 years ago
• ic-lab-duth / RISC-V-Vector
  Vector processor for RISC-V vector ISA
  ☆117Updated 4 years ago
• schoeberl / chisel-lab
  Lab exercises for Chisel in the digital electronics 2 course at DTU
  ☆193Updated 3 weeks ago
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆97Updated 5 years ago
• WilsonChen003 / HDLGen
  HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…
  ☆96Updated last year
• adki / gen_amba_2021
  AMBA bus generator including AXI4, AXI3, AHB, and APB
  ☆199Updated last year
• ananthbhat94 / DDR4MemoryController
  HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
  ☆74Updated 7 years ago
• adki / gen_amba
  AMBA bus generator including AXI, AHB, and APB
  ☆99Updated 3 years ago
• cnrv / fpga-rocket-chip
  Wrapper for Rocket-Chip on FPGAs
  ☆132Updated 2 years ago
• ucb-ucie / uciedigital
  Pure digital components of a UCIe controller
  ☆60Updated 2 weeks ago
• sycuricon / starship
  Run rocket-chip on FPGA
  ☆67Updated 5 months ago
• hyf6661669 / Synopsys-Documents
  Some useful documents of Synopsys
  ☆70Updated 3 years ago
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆152Updated 6 months ago
• erihsu / INT_FP_MAC
  INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.
  ☆98Updated 4 years ago
• XUANTIE-RV / opene902
  OpenXuantie - OpenE902 Core
  ☆143Updated 9 months ago