Alternatives and similar repositories for cpu_gs132

Users that are interested in cpu_gs132 are comparing it to the libraries listed below

• Icenowy / ice-risc
  RISC CPU by Icenowy
  ☆12Updated 7 years ago
• comparch-security / chipyard-random-llc
  A Rocket-Chip with a Dynamically Randomized LLC
  ☆13Updated last year
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• riscv / riscv-control-transfer-records
  This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…
  ☆23Updated 10 months ago
• ultraembedded / riscv-linux-boot
  Trivial RISC-V Linux binary bootloader
  ☆52Updated 4 years ago
• trivialmips / TrivialMIPS_Software
  Baremetal softwares for TrivialMIPS platform
  ☆11Updated 6 years ago
• dramforever / opensbi-h
  [No longer active] A fork of OpenSBI, with software-emulated hypervisor extension support
  ☆42Updated 4 months ago
• char-fish-after-lunch / SystemOnCat
  An SoC with multiple RISC-V IMA processors.
  ☆19Updated 7 years ago
• loongson-community / docs
  Collection of Loongson products' public documentation
  ☆88Updated last week
• OpenRigil / openrigil-rtl
  Open-source RISC-V cryptographic hardware token, RTL repo
  ☆20Updated 3 years ago
• shengwenliang / fpga-nvme-controller
  Chisel NVMe controller
  ☆25Updated 3 years ago
• jiegec / jtag-remote-server
  Remote JTAG server for remote debugging
  ☆43Updated last week
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆37Updated last month
• freecores / sparc64soc
  OpenSPARC-based SoC
  ☆74Updated 11 years ago
• himanshu5-prog / vortexGPU
  ☆24Updated 4 years ago
• Harry-Chen / fpga-virtual-console
  VT220-compatible console on Cyclone IV EP4CE55F23I7
  ☆43Updated 7 years ago
• OpenPOWERFoundation / a2o
  The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, …
  ☆51Updated 7 months ago
• CircuitCoder / mill
  RV32I by cats
  ☆15Updated 2 years ago
• risclite / ARM9-compatible-soft-CPU-core
  This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone be…
  ☆90Updated 5 years ago
• jiegec / unofficial-loongarch-intrinsics-guide
  Unofficial LoongArch Intrinsics Guide
  ☆66Updated 2 weeks ago
• revyos / xuantie-c900-bugs
  Summary of bugs in Xuantie C9XX core design. include C906/C908/C910/C920
  ☆27Updated 6 months ago
• riscv / riscv-test-env
  ☆51Updated this week
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆45Updated last year
• jbush001 / ChiselGPU
  Experiments with fixed function renderers and Chisel HDL
  ☆59Updated 6 years ago
• jiegec / rocket-chip-vcu128
  Run Rocket Chip on VCU128
  ☆30Updated 2 months ago
• riscv-non-isa / riscv-uefi
  ☆34Updated 3 years ago
• chipsalliance / chisel-interface
  The 'missing header' for Chisel
  ☆22Updated 9 months ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago
• cyyself / cyyrv64
  My RV64 CPU (Work in progress)
  ☆19Updated 3 years ago
• rgwan / bapi-rv32i
  A extremely size-optimized RV32I soft processor for FPGA.
  ☆27Updated 7 years ago