Alternatives and similar repositories for FPGA_HW_Acceleration_Social_Disatancing_Monitor

Users that are interested in FPGA_HW_Acceleration_Social_Disatancing_Monitor are comparing it to the libraries listed below

• louisliuwei / pynq-dpu
  Migrate Xilinx edge AI solution to PYNQ
  ☆17Updated 5 years ago
• markcxli / FPGA_DPU
  This project is to implement YOLO v3 on Xilinx FPGA with DPU
  ☆64Updated 6 years ago
• gowinsemi / GoAI
  GoAI 2.0 Public Repository
  ☆25Updated 3 years ago
• Johnny-Zou / FPGA-Mnist
  Hand written number classification done in hardware (De1-SoC board) using neural networks
  ☆25Updated 7 years ago
• ptoupas / amd-open-hardware-23
  This repository provides an FPGA-based solution for executing object detection, focusing specifically on the popular YOLOv5 model archite…
  ☆48Updated 2 years ago
• mchong6 / MNIST-classifier-in-SystemVerilog
  ☆10Updated 8 years ago
• WangXuan95 / FPGA-HDMI
  An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器
  ☆81Updated last year
• sumilao / Zynq-7000-DPU-TRD
  Zynq-7000 DPU TRD
  ☆47Updated 6 years ago
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆85Updated 2 years ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆51Updated 5 years ago
• hossein1387 / BARVINN
  BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/
  ☆94Updated 11 months ago
• zhutmost / edgeboard
  Make Baidu EdgeBoard Lite as a general Zynq FPGA development board
  ☆29Updated 2 years ago
• mjlyons / vSPI
  Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah…
  ☆41Updated 11 months ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆112Updated 5 years ago
• wutianze / dnndk-pynqz2
  First lesson for you to use DNNDK, also it can be helpful for your AI learning
  ☆77Updated 2 years ago
• damdoy / fpga_image_processing
  IP operations in verilog (simulation and implementation on ice40)
  ☆61Updated 6 years ago
• lllibano / LABFT
  A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs, with error detection capabili…
  ☆14Updated 3 months ago
• ultraembedded / core_ram_tester
  AXI-4 RAM Tester Component
  ☆20Updated 5 years ago
• SCLUO / ITRI-OpenDLA
  OpenDLA for trying the demo and FPGA solution
  ☆18Updated 3 years ago
• ultraembedded / fpga_test_soc
  A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)
  ☆34Updated 5 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆108Updated 7 years ago
• Avnet / petalinux
  Repository used to support automated builds under PetaLinux tools that use Yocto.
  ☆63Updated 9 months ago
• JF-Tan / Takk_Zynq_Labs
  This is just for Takk_Zynq_Labs test.
  ☆27Updated 3 years ago
• Xilinx / kria-vitis-platforms
  Kria Vitis platforms and overlays
  ☆109Updated 7 months ago
• aignacio / mpsoc_example
  ☆60Updated 4 years ago
• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆49Updated 7 years ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆157Updated 3 months ago
• embedeep / FREE-TPU-V3plus-for-FPGA
  FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
  ☆168Updated 2 years ago
• cathalmccabe / PYNQ_tutorials
  ☆101Updated 2 years ago
• brunaanog / Object-Tracking-and-Detection-on-FPGA-Board-Cyclone-II
  ☆18Updated 9 years ago