briansune / USB-PD-3.1-VerilogLinks
USB-PD-3.1-Verilog
☆15Updated last year
Alternatives and similar repositories for USB-PD-3.1-Verilog
Users that are interested in USB-PD-3.1-Verilog are comparing it to the libraries listed below
Sorting:
- MMC (and derivative standards) host controller☆24Updated 4 years ago
- An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components☆46Updated 4 years ago
- SPI-Flash XIP Interface (Verilog)☆43Updated 3 years ago
- Ethernet MAC 10/100 Mbps☆27Updated 3 years ago
- USB Full Speed PHY☆45Updated 5 years ago
- Testbenches for HDL projects☆20Updated 2 weeks ago
- USB 1.1 PHY☆11Updated 11 years ago
- hdmi-ts Project☆13Updated 8 years ago
- FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface☆18Updated 2 years ago
- Very simple Cortex-M1 SoC design based on ARM DesignStart☆17Updated 3 years ago
- USB serial device (CDC-ACM)☆40Updated 5 years ago
- Digital Interpolation Techniques Applied to Digital Signal Processing☆62Updated last year
- ☆30Updated 8 years ago
- DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8☆15Updated 3 years ago
- IEEE P1735 decryptor for VHDL☆36Updated 10 years ago
- USB Type-C Power Delivery FPGA☆24Updated 2 years ago
- Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language☆16Updated 6 years ago
- USB 2.0 Device IP Core☆68Updated 7 years ago
- Xilinx JTAG Toolchain on Digilent Arty board☆17Updated 7 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆53Updated 2 years ago
- FT2232HL JTAG & UART Downloader☆19Updated 4 years ago
- Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter usin…☆20Updated 6 months ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆21Updated 2 years ago
- JESD204b modules in VHDL☆30Updated 6 years ago
- ☆32Updated last year
- USB -> AXI Debug Bridge☆39Updated 4 years ago
- development interface mil-std-1553b for system on chip☆22Updated 7 years ago
- Delta Sigma DAC FPGA☆43Updated 6 months ago
- Verilog IP Cores & Tests☆13Updated 7 years ago
- Basic USB-CDC device core (Verilog)☆81Updated 4 years ago