Alternatives and similar repositories for USB-PD-3.1-Verilog

Users that are interested in USB-PD-3.1-Verilog are comparing it to the libraries listed below

• briansune / USB-PD-Verilog
  USB Type-C Power Delivery FPGA
  ☆22Updated 2 years ago
• ultraembedded / core_ulpi_wrapper
  ULPI Link Wrapper (USB Phy Interface)
  ☆27Updated 5 years ago
• TinyTapeout / tinytapeout-ihp-0p1
  Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process
  ☆17Updated 2 months ago
• ultraembedded / core_mmc
  MMC (and derivative standards) host controller
  ☆24Updated 4 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆27Updated 3 years ago
• analogdevicesinc / testbenches
  Testbenches for HDL projects
  ☆18Updated this week
• Bucknalla / ip_cores
  Verilog IP Cores & Tests
  ☆13Updated 7 years ago
• ymz000 / Kintex-7-xc7k325-pcb
  基于Kintex-7 XC7K325T的高性能FPGA功能验证板
  ☆19Updated 5 years ago
• VideoGPU / FMC_MIPI
  FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface
  ☆17Updated 2 years ago
• GMM-7550 / gmm7550-hardware
  CologneChip GateMate FPGA Module: GMM-7550
  ☆22Updated this week
• j-marjanovic / ocs-tray-mezzanine-adapter
  PCIe adapter for an FPGA accelerator for Open CloudServer
  ☆23Updated 5 years ago
• controlpaths / blog
  Projects published on controlpaths.com and hackster.io
  ☆40Updated 2 years ago
• TI-Bonn / vercolib_pcie
  VHDL PCIe Transceiver
  ☆28Updated 4 years ago
• stnolting / cjtag_bridge
  🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
  ☆24Updated 3 years ago
• ultraembedded / core_ftdi_bridge
  FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge
  ☆32Updated 4 years ago
• subutai-attic / pars
  ☆30Updated 8 years ago
• mwrnd / innova2_xcku15p_ddr4_bram_gpio
  XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA
  ☆18Updated last year
• BrianHGinc / Verilog-Floating-Point-Clock-Divider
  Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter usin…
  ☆20Updated 4 months ago
• 0xArt / RGMII_Ethernet_Transceiver_Verilog
  Verilog module to transmit/receive to/from RGMII compatible ethernet PHY
  ☆24Updated 2 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆44Updated 5 years ago
• hdl-util / i2c
  Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
  ☆27Updated 5 years ago
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆38Updated 3 years ago
• HarmonInstruments / hififo
  Harmon Instruments FIFO to PCI Express interface
  ☆11Updated 4 years ago
• ultraembedded / fpga_test_soc
  A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)
  ☆33Updated 5 years ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated last year
• FDU-ME-ARC / NVMeCHA
  ☆15Updated 3 years ago
• LukiLeu / FPGA_ADC
  An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components
  ☆45Updated 4 years ago
• ChinaQMTECH / ZYJZGW_Kintex-7_XC7K325T_Starter_Kit
  ☆16Updated 3 years ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆38Updated 2 years ago
• hamsternz / MMCM_GPSDO
  An all-digital GPS disciplined oscillator using MMCM phase shift.
  ☆30Updated 2 years ago