cyyself / soc-simulatorLinks
A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
☆49Updated 10 months ago
Alternatives and similar repositories for soc-simulator
Users that are interested in soc-simulator are comparing it to the libraries listed below
Sorting:
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆83Updated 2 years ago
- CQU Dual Issue Machine☆37Updated last year
- A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …☆117Updated 10 months ago
- ☆67Updated 7 months ago
- ☆53Updated last week
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆49Updated last year
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated last year
- A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave☆31Updated 5 months ago
- ☆86Updated last week
- "aura" my super-scalar O3 cpu core☆24Updated last year
- ☆67Updated last year
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆39Updated 2 years ago
- ☆81Updated 4 months ago
- Documentation for XiangShan Design☆30Updated this week
- 适用于龙芯杯团队赛入门选手的应急cache模块☆29Updated last year
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆37Updated 3 years ago
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆51Updated 3 years ago
- Modern co-simulation framework for RISC-V CPUs☆153Updated this week
- Pick your favorite language to verify your chip.☆66Updated this week
- Unofficial guide for ysyx students applying to ShanghaiTech University☆22Updated 6 months ago
- 体系结构研讨 + ysyx高阶大纲 (WIP☆179Updated 11 months ago
- ☆20Updated last year
- ☆98Updated this week
- NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.☆13Updated 5 months ago
- ☆30Updated 7 months ago
- 第六届龙芯杯混元形意太极门战队作品☆18Updated 3 years ago
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆44Updated last year
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆62Updated 3 years ago
- ☆64Updated 2 years ago
- Build mini linux for your own RISC-V emulator!☆21Updated last year