riscv / learn

Related projects ⓘ

Alternatives and complementary repositories for learn

• stevehoover / LF-Building-a-RISC-V-CPU-Core
  ☆347Updated 10 months ago
• mikeroyal / RISC-V-Guide
  RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-…
  ☆535Updated 10 months ago
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,444Updated this week
• riscv-software-src / riscv-tests
  ☆898Updated this week
• schoeberl / chisel-book
  Digital Design with Chisel
  ☆771Updated 2 weeks ago
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆867Updated 3 years ago
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆595Updated last month
• riscv-software-src / opensbi
  RISC-V Open Source Supervisor Binary Interface
  ☆1,030Updated last week
• riscv-non-isa / riscv-arch-test
  ☆516Updated last week
• openhwgroup / cvw
  CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…
  ☆272Updated this week
• suryakantamangaraj / AwesomeRISC-VResources
  It contains a curated list of awesome RISC-V Resources.
  ☆165Updated 3 years ago
• PrincetonUniversity / openpiton
  The OpenPiton Platform
  ☆643Updated last month
• black-parrot / black-parrot
  A Linux-capable RISC-V multicore for and by the world
  ☆627Updated this week
• riscv / riscv-opcodes
  RISC-V Opcodes
  ☆699Updated this week
• ucb-bar / riscv-sodor
  educational microarchitectures for risc-v isa
  ☆688Updated 3 months ago
• riscv / riscv-debug-spec
  Working Draft of the RISC-V Debug Specification Standard
  ☆459Updated 2 months ago
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆841Updated 3 years ago
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,381Updated this week
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,278Updated 3 years ago
• openhwgroup / cv32e40p
  CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
  ☆965Updated 4 months ago
• sifive / freedom-tools
  Tools for SiFive's Freedom Platform
  ☆217Updated 3 years ago
• splinedrive / kianRiscV
  RISC-V Linux SoC, marchID: 0x2b
  ☆711Updated this week
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,006Updated 2 months ago
• stnolting / neorv32
  A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent …
  ☆1,602Updated last week
• YosysHQ / oss-cad-suite-build
  Multi-platform nightly builds of open source digital design and verification tools
  ☆865Updated this week
• riscvarchive / educational-materials
  Educational materials for RISC-V
  ☆224Updated 3 years ago
• chipsalliance / Cores-VeeR-EH1
  VeeR EH1 core
  ☆822Updated last year
• eugene-tarassov / vivado-risc-v
  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
  ☆852Updated 2 weeks ago
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆1,658Updated this week
• riscv / sail-riscv
  Sail RISC-V model
  ☆462Updated this week