asinghani / open-eda-courseLinks
Curriculum for a university course to teach chip design using open source EDA tools
☆102Updated last year
Alternatives and similar repositories for open-eda-course
Users that are interested in open-eda-course are comparing it to the libraries listed below
Sorting:
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆66Updated 2 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆69Updated last year
- Introductory course into static timing analysis (STA).☆96Updated last month
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆186Updated 2 months ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆38Updated 3 years ago
- A PULP SoC for education, easy to understand and extend with a full flow for a physical design.☆127Updated last week
- Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…☆61Updated last year
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆73Updated 4 years ago
- Static Timing Analysis Full Course☆57Updated 2 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆73Updated 4 years ago
- ☆15Updated 2 years ago
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆20Updated 2 months ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆44Updated 4 years ago
- EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)☆160Updated last week
- This repo provide an index of VLSI content creators and their materials☆154Updated 11 months ago
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆161Updated 2 years ago
- ☆12Updated 4 months ago
- A complete open-source design-for-testing (DFT) Solution☆162Updated 2 months ago
- Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.☆104Updated 2 months ago
- ☆157Updated 3 years ago
- ☆161Updated 2 years ago
- Home of the open-source EDA course.☆42Updated last month
- "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado☆88Updated 2 years ago
- SystemVerilog Tutorial☆159Updated 2 months ago
- This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specificatio…☆18Updated last year
- A caravan equipped with API for creating bus protocols in Chisel with ease.☆14Updated 4 months ago
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆92Updated 11 months ago
- Physical Design Flow from RTL to GDS using Opensource tools.☆105Updated 4 years ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆171Updated 8 months ago
- ☆81Updated 2 years ago