Alternatives and similar repositories for Ripes

Users that are interested in Ripes are comparing it to the libraries listed below

• openhwgroup / cva6
  The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
  ☆2,503Updated this week
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,797Updated last week
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,344Updated 3 weeks ago
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,476Updated 3 years ago
• riscv-software-src / riscv-isa-sim
  Spike, a RISC-V ISA Simulator
  ☆2,726Updated this week
• stnolting / neorv32
  🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…
  ☆1,785Updated last week
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,600Updated 2 weeks ago
• riscv-software-src / opensbi
  RISC-V Open Source Supervisor Binary Interface
  ☆1,217Updated 3 weeks ago
• BrunoLevy / learn-fpga
  Learning FPGA, yosys, nextpnr, and RISC-V
  ☆2,822Updated 3 months ago
• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆1,921Updated last month
• YosysHQ / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆3,530Updated 11 months ago
• cnlohr / mini-rv32ima
  A tiny C header-only risc-v emulator.
  ☆1,934Updated last month
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,083Updated 3 months ago
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆1,036Updated 3 years ago
• enjoy-digital / litex
  Build your hardware, easily!
  ☆3,365Updated last week
• riscv-collab / riscv-gnu-toolchain
  GNU toolchain for RISC-V, including GCC
  ☆3,973Updated this week
• cvut / qtrvsim
  RISC-V CPU simulator for education purposes
  ☆557Updated last month
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,418Updated 4 months ago
• andrescv / jupiter
  RISC-V Assembler and Runtime Simulator
  ☆430Updated last year
• hughperkins / VeriGPU
  OpenSource GPU, in Verilog, loosely based on RISC-V ISA
  ☆1,013Updated 6 months ago
• riscv / riscv-opcodes
  RISC-V Opcodes
  ☆769Updated last week
• chipsalliance / chisel
  Chisel: A Modern Hardware Design Language
  ☆4,298Updated this week
• chipsalliance / rocket-chip
  Rocket Chip Generator
  ☆3,471Updated 3 weeks ago
• amaranth-lang / amaranth
  A modern hardware definition language and toolchain based on Python
  ☆1,714Updated last month
• riscv-non-isa / riscv-asm-manual
  RISC-V Assembly Programmer's Manual
  ☆1,519Updated last month
• verilator / verilator
  Verilator open-source SystemVerilog simulator and lint system
  ☆2,946Updated this week
• riscv-software-src / riscv-tests
  ☆1,022Updated this week
• drom / awesome-hdl
  Hardware Description Languages
  ☆1,038Updated 4 months ago
• babbleberry / rpi4-osdev
  Tutorial: Writing a "bare metal" operating system for Raspberry Pi 4
  ☆3,634Updated 4 months ago
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆639Updated last month