The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.
☆580Oct 31, 2026Updated this week
Alternatives and similar repositories for ASIC-Design-Roadmap
Users that are interested in ASIC-Design-Roadmap are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A roadmap for those who want to build a career as an FPGA / ASIC Engineer☆725May 31, 2026Updated 5 months ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆142Feb 22, 2024Updated 2 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆54Dec 3, 2023Updated 2 years ago
- Education kit for teaching VLSI fundamentals through practical microprocessor design using industry EDA tools (educational)☆375May 30, 2025Updated last year
- IC implementation of Systolic Array for TPU☆385Oct 21, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ECE 3300 HDL Code☆63Jan 21, 2023Updated 3 years ago
- This repo provide an index of VLSI content creators and their materials☆179Aug 21, 2024Updated 2 years ago
- This course explains the basics of Tcl scripting language, which is embedded in almost all EDA tools and can be used to automate many ope…☆22Jul 11, 2026Updated 3 months ago
- Curriculum for a university course to teach chip design using open source EDA tools☆180Oct 21, 2023Updated 3 years ago
- A roadmap for learning VLSI design using verilog and HDL☆32Nov 11, 2024Updated last year
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆100Sep 17, 2022Updated 4 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Synopsys tools.☆16Jun 28, 2025Updated last year
- ☆422Apr 13, 2023Updated 3 years ago
- Verilog Design, Simulation & Synthesis of Digital ASIC Projects☆20Jan 27, 2023Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…☆24Apr 15, 2021Updated 5 years ago
- Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC …☆23Aug 6, 2025Updated last year
- Tests for the design flow with Synopsys tools for the implementation of a RISC-V processor.☆28Sep 8, 2024Updated 2 years ago
- ☆34Jun 5, 2026Updated 5 months ago
- This paper presents design of UART module for serial communication used for short-distance, low speed and exchange of data between comput…☆15Mar 30, 2022Updated 4 years ago
- To develop Arm Cortex-M0 based SoCs, from creating high-level functional specifications to design, implementation and testing on FPGA pla…☆46Dec 24, 2020Updated 5 years ago
- A List of Free and Open Source Hardware Verification Tools and Frameworks☆634Jan 3, 2026Updated 10 months ago
- This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specificatio…☆58Jan 23, 2024Updated 2 years ago
- 100 Days of RTL☆429Aug 15, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This repository documents my work on Advanced Physical Design Using OpenLANE/Sky130. The objective of this project was to implement an op…☆24Jul 7, 2021Updated 5 years ago
- "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado☆135Jul 9, 2023Updated 3 years ago
- Convolutional accelerator kernel, target ASIC & FPGA☆267Apr 10, 2023Updated 3 years ago
- ☆11Dec 3, 2025Updated 11 months ago
- Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )☆67Nov 7, 2024Updated last year
- A PULP SoC for education, easy to understand and extend with a full flow for a physical design.☆295Oct 28, 2026Updated last week
- This repository contains all major projects completed as part of the EECS 4612: Digital VLSI Design course at York University. The projec…☆13Jul 12, 2025Updated last year
- ☆126Aug 1, 2026Updated 3 months ago
- Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…☆235Jan 29, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of ORCA which was taped-out by NTI.☆33Feb 11, 2024Updated 2 years ago
- Physical Design Flow from RTL to GDS using Opensource tools.☆141Nov 23, 2020Updated 5 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆20Jan 28, 2022Updated 4 years ago
- This repository contains the tasks performed for VL508- Physical Design of ASIC Course (Fall 2024)☆34Nov 25, 2024Updated last year
- Awesome ASIC design verification☆371Feb 9, 2022Updated 4 years ago
- Examples of the TCL Scripts for different purposes and for VLSI Physical Design are provided here for your reference☆40Dec 30, 2022Updated 3 years ago
- This repo contains the skeleton scripts for running a full RTL2GDS flow using Cadence tools, as demonstrated in the Full RTL2GDS Demo pre…☆93Oct 18, 2025Updated last year