abdelazeem201 / ASIC-Design-Roadmap
The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.
☆217Updated last week
Related projects: ⓘ
- This repo provide an index of VLSI content creators and their materials☆129Updated 3 weeks ago
- 100 Days of RTL☆324Updated last month
- Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied …☆191Updated last month
- ☆97Updated 8 months ago
- "Mastering Verilog Programming for Digital Circuit Design: RTL and TestBench Codes Practice with HDL-BITS"☆14Updated last year
- ☆41Updated last week
- SystemVerilog Tutorial☆111Updated 9 months ago
- Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…☆88Updated 7 months ago
- EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)☆125Updated 2 weeks ago
- ECE 3300 HDL Code☆40Updated last year
- A roadmap for those who want to build a career as an FPGA / ASIC Engineer☆188Updated 5 months ago
- Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedd…☆102Updated last month
- ☆12Updated 7 months ago
- Awesome ASIC design verification☆244Updated 2 years ago
- opensource EDA tool flor VLSI design☆29Updated last year
- Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools☆92Updated 2 years ago
- ☆117Updated 2 years ago
- This repository contains the design files of RISC-V Single Cycle Core☆24Updated 9 months ago
- lowRISC Style Guides☆357Updated this week
- ☆278Updated last year
- ☆16Updated 8 months ago
- ☆22Updated last year
- ☆9Updated last year
- IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively s…☆298Updated this week
- "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado☆42Updated last year
- Verilog/SystemVerilog Guide☆54Updated 8 months ago
- This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…☆133Updated 6 months ago
- VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.☆12Updated 4 months ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆58Updated 2 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆108Updated 3 years ago