Alternatives and similar repositories for pulp-nn

Users that are interested in pulp-nn are comparing it to the libraries listed below

• pulp-platform / stream-ebpc
  Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…
  ☆24Updated 5 years ago
• SingularityKChen / dl_accelerator
  Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions
  ☆198Updated 5 years ago
• tum-ei-eda / muriscv-nn
  muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.
  ☆85Updated last week
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆80Updated 6 years ago
• ucb-bar / onnxruntime-riscv
  Fork of upstream onnxruntime focused on supporting risc-v accelerators
  ☆87Updated 2 years ago
• pulp-platform / dory
  A tool to deploy Deep Neural Networks on PULP-based SoC's
  ☆83Updated 3 weeks ago
• zeasa / nvdla-compiler
  ☆46Updated 5 years ago
• jiaaom / HPDLA
  Systolic-array based Deep Learning Accelerator generator
  ☆25Updated 4 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆97Updated last year
• soDLA-publishment / somnia
  Learn NVDLA by SOMNIA
  ☆42Updated 5 years ago
• awai54st / LUTNet
  ☆58Updated 5 years ago
• pulp-platform / redmule
  ☆72Updated 2 weeks ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆46Updated 6 months ago
• hlslibs / hls_tutorials
  Tutorials on HLS Design
  ☆52Updated 5 years ago
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆86Updated 3 months ago
• chenhaoc / cnnhwpe
  ☆66Updated 3 years ago
• EECS-NTNU / bismo
  BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing
  ☆141Updated 5 years ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆59Updated 3 years ago
• CSL-KU / firesim-nvdla
  FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud
  ☆163Updated 3 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆167Updated last year
• meton-robean / Vector_MulAdd_Accelerator
  vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器
  ☆53Updated 5 years ago
• DNN-Accelerators / Open-Source-IPs
  ☆34Updated 6 years ago
• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• ARM-software / DeepFreeze
  ☆40Updated 5 years ago
• Jerc007 / Open-GPGPU-FlexGrip-
  FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
  ☆108Updated 2 years ago
• suoglu / Fixed-Floating-Point-Adder-Multiplier
  16-bit Adder Multiplier hardware on Digilent Basys 3
  ☆77Updated 2 years ago
• hossein1387 / BARVINN
  BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/
  ☆90Updated 7 months ago
• DPCEKY / systolic-array
  HLS implemented systolic array structure
  ☆41Updated 7 years ago
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆53Updated 4 years ago
• pulp-platform / pulp-dsp
  ☆33Updated 2 years ago