Alternatives and similar repositories for pyxir:

Users that are interested in pyxir are comparing it to the libraries listed below

• ucb-bar / onnxruntime-riscv
  Fork of upstream onnxruntime focused on supporting risc-v accelerators
  ☆83Updated last year
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆42Updated 2 years ago
• awai54st / LUTNet
  ☆56Updated 4 years ago
• lukasc-ch / ExtendedBitPlaneCompression
  Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…
  ☆17Updated 5 years ago
• jgoeders / dac_sdc_2021
  ☆23Updated 3 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆36Updated 4 years ago
• Xilinx / gemx
  Matrix Operation Library for FPGA https://xilinx.github.io/gemx/
  ☆63Updated 5 years ago
• suchandler96 / gem5-NVDLA
  ☆24Updated 4 months ago
• DNN-Accelerators / Open-Source-IPs
  ☆33Updated 5 years ago
• UCLA-VAST / FlexCNN
  ☆71Updated last year
• soDLA-publishment / somnia
  Learn NVDLA by SOMNIA
  ☆30Updated 5 years ago
• zeasa / nvdla-compiler
  ☆42Updated 5 years ago
• Xilinx / finn-base
  Open Source Compiler Framework using ONNX as Frontend and IR
  ☆29Updated 2 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 3 years ago
• sfu-arch / SpGEMM
  ☆33Updated 3 years ago
• maao666 / HPDLA
  Systolic-array based Deep Learning Accelerator generator
  ☆25Updated 4 years ago
• Xilinx / logicnets
  ☆83Updated 7 months ago
• ARM-software / DeepFreeze
  ☆40Updated 5 years ago
• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆55Updated 6 months ago
• TUD-ADS / HiFlipVX
  ☆17Updated 2 years ago
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆47Updated last week
• StanfordAHA / Halide-to-Hardware
  ☆80Updated last week
• template-hls / template-hls-float
  ☆27Updated 5 years ago
• union-codesign / union
  ☆15Updated 3 years ago
• GATECH-EIC / AutoDNNchip
  ☆69Updated 4 years ago
• EECS-NTNU / bismo
  BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing
  ☆132Updated 5 years ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆54Updated 3 years ago
• WuDan0399 / Integrate-NVDLA-and-TVM
  ☆30Updated last year
• microideax / T-DLA
  ☆18Updated 5 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆60Updated 3 years ago