EEESlab / CMSIS_NN-INTQLinks
INT-Q Extension of the CMSIS-NN library for ARM Cortex-M target
☆18Updated 5 years ago
Alternatives and similar repositories for CMSIS_NN-INTQ
Users that are interested in CMSIS_NN-INTQ are comparing it to the libraries listed below
Sorting:
- CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices☆44Updated 5 years ago
- μNAS is a neural architecture search (NAS) system that designs small-yet-powerful microcontroller-compatible neural networks.☆81Updated 4 years ago
- Mobilenet v1 trained on Imagenet for STM32 using extended CMSIS-NN with INT-Q quantization support☆87Updated 5 years ago
- ☆31Updated 5 years ago
- A tool to deploy Deep Neural Networks on PULP-based SoC's☆83Updated 3 weeks ago
- ☆34Updated 6 years ago
- Jupyter notebook examples on image classification with quantized neural networks☆69Updated 5 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆141Updated 5 years ago
- This repository contains the results and code for the MLPerf™ Tiny Inference v0.7 benchmark.☆18Updated 2 years ago
- This repository containts the pytorch scripts to train mixed-precision networks for microcontroller deployment, based on the memory contr…☆50Updated last year
- ☆40Updated 5 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆34Updated last year
- Residual Binarized Neural Network☆43Updated 7 years ago
- HLS implemented systolic array structure☆41Updated 7 years ago
- Generate an FPGA design for a TWN☆10Updated 5 years ago
- A library to train and deploy quantised Deep Neural Networks☆25Updated 8 months ago
- An LSTM template and a few examples using Vivado HLS☆45Updated last year
- ☆58Updated 5 years ago
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆12Updated 3 years ago
- This is a collection of works on neural networks and neural accelerators.☆40Updated 6 years ago
- Static Block Floating Point Quantization for CNN☆34Updated 4 years ago
- 🧠 Benchmark facility to train networks on different datasets for PyTorch/Brevitas☆26Updated 2 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53Updated 7 years ago
- ☆31Updated 9 months ago
- Tool for the deployment and analysis of TinyML applications on TFLM and MicroTVM backends☆35Updated 2 weeks ago
- ☆83Updated last year
- Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.☆30Updated 9 months ago
- Models and examples built with hls4ml☆12Updated 5 years ago
- ☆10Updated last year
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 3 years ago