Nuclei AI Library Optimized For RISC-V Vector
☆16Oct 15, 2025Updated last year
Alternatives and similar repositories for nuclei-ai-library
Users that are interested in nuclei-ai-library are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- An optimized neural network operator library for chips base on Xuantie CPU.☆105Feb 10, 2026Updated 8 months ago
- Nuclei Microcontroller Software Interface Standard Development Repo☆94Jun 16, 2026Updated 4 months ago
- muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.☆107Oct 26, 2026Updated last week
- A matrix extension proposal for AI applications under RISC-V architecture☆190Apr 1, 2026Updated 7 months ago
- Hardware aware neural architecture search☆13Sep 29, 2025Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- CMSIS DSP Library for PULPino microcontroller☆24Aug 16, 2018Updated 8 years ago
- ☆18Jul 31, 2021Updated 5 years ago
- Seal5 - Semi-automated LLVM Support for RISC-V Extensions including Autovectorization☆25Oct 27, 2026Updated last week
- Rocket Chip Generator☆13Jul 31, 2021Updated 5 years ago
- A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code☆155Aug 14, 2026Updated 2 months ago
- Custom BLAS and LAPACK Cross-Compilation Framework for RISC-V☆19Apr 26, 2020Updated 6 years ago
- [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4☆40Feb 4, 2021Updated 5 years ago
- End-to-End NPU: RTL systolic array → AXI4 SoC → TVM compiler → FPGA inference☆70Jul 29, 2026Updated 3 months ago
- Python script for controlling the debug-jtag port of riscv cores☆16Mar 27, 2021Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A concolic testing engine for RISC-V embedded software with support for SystemC peripherals☆27Oct 4, 2023Updated 3 years ago
- TVM for chips base on Xuantie CPU, an open deep learning compiler stack.☆31Feb 10, 2026Updated 8 months ago
- MESIF cache coherency protocol for the GEM5 simulator☆15Jun 2, 2016Updated 10 years ago
- MathLib DAC 2023 version☆13Sep 11, 2023Updated 3 years ago
- RiVEC Bencmark Suite☆134Nov 27, 2024Updated last year
- Example of RISC-V Vector programming☆31Jul 14, 2026Updated 3 months ago
- A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code. (Results)☆51Aug 24, 2026Updated 2 months ago
- Unit tests generator for RVV 1.0☆118May 25, 2026Updated 5 months ago
- PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases☆21Nov 26, 2020Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Official QEMU mirror. Please see http://wiki.qemu.org/Contribute/SubmitAPatch for how to submit changes to QEMU. Pull Requests are ignore…☆14Aug 27, 2026Updated 2 months ago
- Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.☆41Feb 6, 2024Updated 2 years ago
- ☆90Aug 26, 2025Updated last year
- GNU toolchain for Xuantie RISC-V CPU, including GCC and Binutils ……☆119Apr 12, 2025Updated last year
- Extensions for the TG geometry library☆12Dec 3, 2024Updated last year
- FPGA Many-core Processor Implementation☆11Nov 27, 2024Updated last year
- ☆33Jun 7, 2025Updated last year
- MTCNN face detection with C and Arm-CMSIS-DSP☆19Aug 19, 2021Updated 5 years ago
- A free, fast and compact ARM Cortex-M0 floating-point library☆17May 26, 2021Updated 5 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- RISC-V SIMD Superscalar Dual-Issue Processor☆31Apr 24, 2025Updated last year
- Tool for the deployment and analysis of TinyML applications on TFLM and MicroTVM backends☆35Updated this week
- Like VexRiscv, but, Harder, Better, Faster, Stronger☆267Updated this week
- Reinforcement learning environment for Overmind☆14Jan 13, 2024Updated 2 years ago
- ☆10Sep 1, 2020Updated 6 years ago
- RISC-V Zve32x, Zve32f, Zvfh Vector Coprocessor☆24Oct 27, 2026Updated last week
- ☆19Jul 26, 2024Updated 2 years ago