Alternatives and similar repositories for mlonmcu

Users that are interested in mlonmcu are comparing it to the libraries listed below

• tum-ei-eda / muriscv-nn
  muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.
  ☆88Updated last month
• soDLA-publishment / somnia
  Learn NVDLA by SOMNIA
  ☆42Updated 5 years ago
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆23Updated 4 years ago
• pulp-platform / pulp-nn
  ☆86Updated 2 years ago
• pulp-platform / pulp-trainlib
  Floating-Point Optimized On-Device Learning Library for the PULP Platform.
  ☆37Updated 2 weeks ago
• LCAI-TIHU / SW
  LCAI-TIHU SW is a software stack of the AI inference processor based on RISC-V
  ☆23Updated 2 years ago
• pulp-platform / redmule
  ☆87Updated last week
• pulp-platform / dory
  A tool to deploy Deep Neural Networks on PULP-based SoC's
  ☆90Updated 3 months ago
• pulp-platform / gvsoc
  Pulp virtual platform
  ☆24Updated 4 months ago
• hsa-ees / paranut
  The ParaNut Processor - Highly Parallel and More Than Just a CPU Core
  ☆36Updated 2 years ago
• pulp-platform / neureka
  2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters
  ☆27Updated last month
• embecosm / ri5cy
  The PULP RI5CY core modified for Verilator modeling and as a GDB server.
  ☆25Updated 6 years ago
• gvsoc / gvsoc
  ☆34Updated last week
• zeasa / nvdla-compiler
  ☆46Updated 5 years ago
• suchandler96 / gem5-NVDLA
  ☆36Updated 7 months ago
• sfu-arch / SpGEMM
  ☆36Updated 4 years ago
• pulp-platform / ITA
  ☆55Updated 6 months ago
• pulp-platform / quadrilatero
  matrix-coprocessor for RISC-V
  ☆25Updated 6 months ago
• pulp-platform / Deeploy
  DNN Compiler for Heterogeneous SoCs
  ☆53Updated last week
• THU-DSP-LAB / ventus-gpgpu-cpp-simulator
  Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus
  ☆29Updated this week
• pulp-platform / pulp-dsp
  ☆35Updated 2 years ago
• yonseicasl / NPUsim
  NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators
  ☆44Updated 10 months ago
• SameLight / ITRI-OpenDLA
  Express DLA implementation for FPGA, revised based on NVDLA.
  ☆11Updated 6 years ago
• ics-jku / riscv-vp-plusplus
  RISCV-VP++ is a extended and improved successor of the RISC-V based Virtual Prototype (VP) RISC-V VP. It is maintained at the Institute f…
  ☆45Updated last week
• alexmr09 / Mixed-precision-Neural-Networks-on-RISC-V-Cores
  ☆35Updated 3 weeks ago
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆82Updated 6 years ago
• hlslibs / ac_ml
  Algorithmic C Machine Learning Library
  ☆26Updated 10 months ago
• AlessandroCilardo / NaplesPU
  The official NaplesPU hardware code repository
  ☆19Updated 6 years ago
• nietzhuang / Cycle-accurate-Eyeriss-model
  A scalable Eyeriss model in SystemC.
  ☆30Updated 2 years ago
• whatmough / CHIPKIT
  CHIPKIT: An agile, reusable open-source framework for rapid test chip development
  ☆42Updated 5 years ago