Alternatives and similar repositories for quantlib

Users that are interested in quantlib are comparing it to the libraries listed below

• pulp-platform / pulp-trainlib
  Floating-Point Optimized On-Device Learning Library for the PULP Platform.
  ☆36Updated last month
• pulp-platform / Deeploy
  DNN Compiler for Heterogeneous SoCs
  ☆47Updated last week
• pulp-platform / quantlab
  ☆38Updated last year
• pulp-platform / dory
  A tool to deploy Deep Neural Networks on PULP-based SoC's
  ☆88Updated last month
• robertoBosio / NN2FPGA
  From Pytorch model to C++ for Vitis HLS
  ☆17Updated last week
• KULeuven-MICAS / zigzag
  HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators
  ☆158Updated last month
• pulp-platform / pulp-nn
  ☆85Updated last year
• DNN-Accelerators / Open-Source-IPs
  ☆34Updated 6 years ago
• awai54st / LUTNet
  ☆60Updated 5 years ago
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆89Updated this week
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆59Updated 3 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆98Updated last year
• MartaAndronic / NeuraLUT
  NeuraLUT-Assemble
  ☆41Updated last month
• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆149Updated 4 months ago
• eml-eda / plinio
  A Plug-and-play Lightweight tool for the Inference Optimization of Deep Neural networks
  ☆44Updated 2 weeks ago
• weierwan / Neurram_48core
  Verilog and Python drivers and APIs for Neurram 48-core chip
  ☆40Updated 3 years ago
• tum-ei-eda / muriscv-nn
  muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.
  ☆86Updated last month
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆48Updated 7 months ago
• EEESlab / CMix-NN
  CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices
  ☆47Updated 5 years ago
• pulp-platform / stream-ebpc
  Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…
  ☆24Updated 5 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆58Updated 2 months ago
• DeepWok / mase
  Machine-Learning Accelerator System Exploration Tools
  ☆178Updated this week
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆63Updated last month
• ebby-s / MX-for-FPGA
  Implementation of Microscaling data formats in SystemVerilog.
  ☆24Updated 2 months ago
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆155Updated this week
• sharc-lab / FPGA_ECE8893
  ☆37Updated 6 months ago
• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆45Updated last year
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆81Updated 6 years ago
• UCLA-VAST / FlexCNN
  ☆72Updated 2 years ago