CRC Theory and Implement. explain initial value of CRC
☆16Feb 26, 2021Updated 5 years ago
Alternatives and similar repositories for A-guide-of-CRC
Users that are interested in A-guide-of-CRC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆43Jan 8, 2021Updated 5 years ago
- 10_100_1000 Mbps tri-mode ethernet MAC☆11Jul 17, 2014Updated 12 years ago
- C# projects that use ANTLR4 library to analyse VHDL and Verilog code☆11Feb 28, 2015Updated 11 years ago
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 7 years ago
- Next-Generation FPGA Place-and-Route☆10Aug 1, 2018Updated 8 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- SGMII☆14Jul 17, 2014Updated 12 years ago
- SystemVerilog examples for a digital design course☆14Mar 30, 2021Updated 5 years ago
- Altera MAX V bitstream documentation -- CLEANUP PENDING☆17May 23, 2020Updated 6 years ago
- Used for hardware trojan detection(Based on Trust_Hub)☆11Jul 30, 2019Updated 7 years ago
- GUI for SymbiYosys☆19Aug 4, 2026Updated 2 months ago
- Digital audio equalizer created written in Verilog for Altera DE1 SoC FPGA board.☆12Aug 9, 2019Updated 7 years ago
- Mini RISC-V CPU☆11Dec 26, 2019Updated 6 years ago
- Contains the ROS driver and firmware for the WGE100 camera used on the PR2 robot.☆16Mar 5, 2023Updated 3 years ago
- Complete UCIe v2.0 Controller RTL Implementation with Revolutionary 128 Gbps PAM4 Signaling - Architecture Design Complete, Ready for RTL…☆41Aug 30, 2025Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- A collection of slides of the SMT course I held at University of Milan in fall 2011☆10Mar 14, 2015Updated 11 years ago
- Hardware Trojan on a Basis 3 FPGA for Hardware and Embedded Systems Security☆11May 1, 2017Updated 9 years ago
- WISHBONE Interconnect☆11Oct 1, 2017Updated 9 years ago
- FIR,FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- 100G Udp Link For axi Stream☆17Jun 27, 2023Updated 3 years ago
- Engineering Program on RTL Design for FPGA Accelerator☆36Aug 1, 2020Updated 6 years ago
- GPU-accelerated RePlAce☆14Jun 11, 2024Updated 2 years ago
- Typhoon GPU on FPGA☆13Aug 22, 2019Updated 7 years ago
- Implementation of a circular queue in hardware using verilog.☆18Mar 22, 2019Updated 7 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- a very very simple flash translation layer(FTL) algorithm☆13Feb 14, 2017Updated 9 years ago
- AXI Interface Nand Flash Controller (Sync mode)☆115May 8, 2026Updated 5 months ago
- This is a code repo for previous projects in Digital Design & Verification☆20Jan 6, 2015Updated 11 years ago
- Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board☆19Apr 13, 2022Updated 4 years ago
- ANSI-C benchmarks generated from Verilog RTL circuits with safety assertions. Used for Formal Property Verification.☆17Dec 1, 2018Updated 7 years ago
- This linter plugin for SublimeLinter provides an interface to iverilog (verilog compiler).☆13Apr 16, 2024Updated 2 years ago
- A self-hosting Forth for J1-style CPUs☆30Sep 2, 2023Updated 3 years ago
- Quantized Training for Convolutional Neural Networks using Xilinx Brevitas☆12Mar 16, 2022Updated 4 years ago
- Project in Course named DESIGN AND IMPLEMENTATION OF COMMUNICATION PROTOCOLS in FCU☆17Oct 18, 2014Updated 12 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- STM32F103C8T6-SI4432_SMT点对点无线透传。☆13May 5, 2017Updated 9 years ago
- Hardware Description Language on FPGA☆12Sep 18, 2023Updated 3 years ago
- OSAL free operating system abstraction for embedded systems. Supports pthreads, freertos, chibios, coocox, bertos and more... RTOS☆14Dec 27, 2013Updated 12 years ago
- Our contribution to the AMD Open Hardware Contest: A ML-based Deep Packet Inspection for RDMA-networking on FPGAs☆13May 6, 2026Updated 5 months ago
- Digital system design: Training lessons and exercise projects for students☆11May 12, 2023Updated 3 years ago
- WISHBONE DMA/Bridge IP Core☆18Jul 17, 2014Updated 12 years ago
- Repository to store all design and testbench files for Senior Design☆23Apr 16, 2020Updated 6 years ago