RotemBenHur / SIMPLE-MAGIC
SIMPLE MAGIC: Synthesis and In-memory MaPping of Logic Execution for Memristor Aided loGIC
☆14Updated 4 years ago
Alternatives and similar repositories for SIMPLE-MAGIC:
Users that are interested in SIMPLE-MAGIC are comparing it to the libraries listed below
- Benchmarks for Approximate Circuit Synthesis☆15Updated 4 years ago
- DUTH RISC V Microprocessor for High Level Synthesis☆10Updated last year
- A synthesis flow for hybrid processing-in-RRAM modes☆12Updated 3 years ago
- Dataset for ML-guided Accelerator Design☆33Updated 2 months ago
- ☆52Updated last year
- Benchmark framework of 3D integrated CIM accelerators for popular DNN inference, support both monolithic and heterogeneous 3D integration☆21Updated 3 years ago
- sram/rram/mram.. compiler☆30Updated last year
- Generator of arithmetic circuits (multipliers, adders) and approximate circuits☆30Updated this week
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆29Updated last year
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆67Updated 3 years ago
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆18Updated 3 weeks ago
- ☆25Updated 8 months ago
- Ratatoskr NoC Simulator☆22Updated 3 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆42Updated 2 years ago
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆22Updated 3 months ago
- This repository includes the Resistive Random Access Memory (RRAM) Compiler which is designed in the context of the research project of D…☆59Updated 2 years ago
- A list of our chiplet simulaters☆26Updated 3 years ago
- Library of approximate arithmetic circuits☆53Updated 2 years ago
- A RRAM addon for the NCSU FreePDK 45nm☆23Updated 3 years ago
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆23Updated last month
- GOMIL: Global Optimization of Multiplier by Integer Linear Programming☆12Updated 3 years ago
- ☆22Updated 8 months ago
- A toolchain for rapid design space exploration of chiplet architectures☆41Updated 8 months ago
- A general framework for optimizing DNN dataflow on systolic array☆33Updated 4 years ago
- Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of th…☆12Updated 4 years ago
- A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robot…☆36Updated 3 months ago
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆24Updated 5 years ago
- ☆9Updated last year
- ☆24Updated 5 years ago
- HW accelerator mapping optimization framework for in-memory computing☆21Updated this week