Alternatives and similar repositories for SIMPLER-MAGIC

Users that are interested in SIMPLER-MAGIC are comparing it to the libraries listed below

• zshi0616 / python-deepgate
  ☆26Updated last year
• lydiawunan / HLS-Perf-Prediction-with-GNNs
  High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing
  ☆51Updated last year
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆71Updated 2 weeks ago
• Yu-Maryland / Gamora
  Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)
  ☆54Updated 10 months ago
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆58Updated 6 months ago
• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆25Updated 2 months ago
• UT-LCA / ML4Accel-Dataset
  Dataset for ML-guided Accelerator Design
  ☆41Updated last year
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆91Updated 8 months ago
• ABKGroup / TritonPart
  The first version of TritonPart
  ☆29Updated last year
• pnnl / soda-opt
  ☆53Updated 4 months ago
• UCLA-VAST / Stream-HLS
  An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs
  ☆54Updated 3 months ago
• hkust-zhiyao / PANDA
  PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions
  ☆17Updated last year
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆76Updated 2 months ago
• lamda-bbo / Open3DBench
  Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".
  ☆66Updated 5 months ago
• Yu-Maryland / Verilog-to-PyG
  ☆28Updated last year
• HKUSTGZ-MICS-LYU / FlattenRTL
  This is a python repo for flattening Verilog
  ☆20Updated 6 months ago
• yaoxufeng / RTLRewriter-Bench
  ☆40Updated last year
• VeriGOOD-ML / public
  ☆64Updated 7 months ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆64Updated last year
• cornell-zhang / HOGA
  Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits
  ☆33Updated last year
• pku-dasys / easymac
  ☆16Updated 3 years ago
• FCAS-LAB / chiplet_simulators
  A list of our chiplet simulaters
  ☆44Updated 5 months ago
• Entropy-xcy / sns
  ☆20Updated 3 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆61Updated 8 months ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆97Updated this week
• zlinaf / PowerGear
  [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
  ☆18Updated 3 years ago
• sjtu-zhao-lab / hierarchical-gnn-for-hls
  DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"
  ☆17Updated 11 months ago
• arc-research-lab / AIM
  AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…
  ☆25Updated 6 months ago
• hkust-zhiyao / AssertLLM
  Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
  ☆43Updated last year
• zshi0616 / DeepGate2
  ☆31Updated last year