ASU-VDA-Lab / MLCAD25-Contest-Scripts-BenchmarksLinks
☆16Updated 4 months ago
Alternatives and similar repositories for MLCAD25-Contest-Scripts-Benchmarks
Users that are interested in MLCAD25-Contest-Scripts-Benchmarks are comparing it to the libraries listed below
Sorting:
- Collection of digital hardware modules & projects (benchmarks)☆80Updated 2 months ago
- OpenDesign Flow Database☆17Updated 7 years ago
- ☆95Updated 7 months ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆61Updated last year
- IDEA project source files☆111Updated 3 months ago
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆49Updated last year
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆66Updated 8 months ago
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆30Updated 6 years ago
- DATC RDF☆50Updated 5 years ago
- ☆38Updated 2 years ago
- ☆27Updated last year
- Artificial Netlist Generator☆46Updated last year
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆98Updated last year
- ☆20Updated 3 years ago
- ☆109Updated 6 years ago
- ☆30Updated last year
- Logic optimization and technology mapping tool.☆20Updated 2 years ago
- Generator of arithmetic circuits (multipliers, adders) and approximate circuits☆39Updated 5 months ago
- ☆79Updated last month
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆39Updated last month
- ITC'99 benchmarks developed in the CAD Group at Politecnico di Torino☆67Updated 8 months ago
- EDA physical synthesis optimization kit☆64Updated 2 years ago
- ☆27Updated last year
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆28Updated 4 years ago
- ☆50Updated last year
- ☆31Updated 2 years ago
- ☆32Updated 4 years ago
- AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining☆18Updated 3 years ago
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆201Updated 5 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit