☆45Mar 2, 2023Updated 3 years ago
Alternatives and similar repositories for asap5
Users that are interested in asap5 are comparing it to the libraries listed below
Sorting:
- An open source PDK using TIGFET 10nm devices.☆56Dec 19, 2022Updated 3 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆19Jul 22, 2020Updated 5 years ago
- ☆196Aug 30, 2021Updated 4 years ago
- reference block design for the ASAP7nm library in Cadence Innovus☆59Jun 25, 2024Updated last year
- ☆248Mar 12, 2025Updated last year
- ☆10Apr 8, 2025Updated 11 months ago
- KLayout technology files for ASAP7 FinFET educational process☆25Feb 5, 2023Updated 3 years ago
- GT3 PDK☆24Nov 14, 2025Updated 4 months ago
- ☆31Apr 23, 2024Updated last year
- ☆21May 25, 2023Updated 2 years ago
- An open-source custom cache generator.☆34Mar 14, 2024Updated 2 years ago
- This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Proce…☆30Jul 25, 2023Updated 2 years ago
- Supplemental technology files for ASAP7 PDK with Synopsys design flow☆23Jan 27, 2023Updated 3 years ago
- ☆15Jul 14, 2024Updated last year
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆41Dec 24, 2025Updated 2 months ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆44Apr 13, 2023Updated 2 years ago
- Automated Repair of Verilog Hardware Descriptions☆37Jan 16, 2025Updated last year
- ☆26Apr 24, 2021Updated 4 years ago
- BAG2 workspace for fake PDK (cds_ff_mpt)☆60May 20, 2020Updated 5 years ago
- Open source Photonics PDK for VTT's 3 um SOI platform.☆14May 26, 2025Updated 9 months ago
- corundum work on vu13p☆23Nov 10, 2023Updated 2 years ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆30Jul 30, 2022Updated 3 years ago
- EPFL logic synthesis benchmarks☆234Mar 3, 2026Updated 2 weeks ago
- Analog Placement Quality Prediction☆25Mar 24, 2023Updated 2 years ago
- ASTRAN - Automatic Synthesis of Transistor Networks☆66Apr 4, 2022Updated 3 years ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆92Aug 22, 2024Updated last year
- ☆31May 8, 2025Updated 10 months ago
- Characterizer☆32Nov 19, 2025Updated 4 months ago
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:☆694Updated this week
- EDA physical synthesis optimization kit☆64Nov 13, 2023Updated 2 years ago
- GPU-based logic synthesis tool☆100Nov 27, 2025Updated 3 months ago
- ☆15May 17, 2025Updated 10 months ago
- This is a personal archive. Please refer to github.com/UCLA-VAST/RapidStream☆15May 31, 2022Updated 3 years ago
- An open-source static random access memory (SRAM) compiler.☆1,021Mar 12, 2026Updated last week
- ☆40Jun 3, 2023Updated 2 years ago
- A High-performance Timing Analysis Tool for VLSI Systems☆10Feb 11, 2021Updated 5 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆120Sep 20, 2023Updated 2 years ago
- Interchange formats for chip design.☆38Feb 15, 2026Updated last month
- OLSQ (pronounced all-s-k): Optimal Layout Synthesis for Quantum Computing☆25Jul 23, 2022Updated 3 years ago