ncsu-eda / FreePDK3Links
☆164Updated 3 years ago
Alternatives and similar repositories for FreePDK3
Users that are interested in FreePDK3 are comparing it to the libraries listed below
Sorting:
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆182Updated 5 years ago
- ☆178Updated 5 months ago
- mflowgen -- A Modular ASIC/FPGA Flow Generator☆258Updated 3 weeks ago
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆187Updated 3 months ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆155Updated last month
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆74Updated 3 years ago
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆351Updated this week
- Introductory course into static timing analysis (STA).☆96Updated last month
- ☆148Updated 2 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆74Updated 4 years ago
- Fully Open Source FASOC generators built on top of open-source EDA tools☆287Updated last month
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆95Updated last year
- ☆82Updated this week
- OpenROAD users should look at this repository first for instructions on getting started☆101Updated 4 years ago
- reference block design for the ASAP7nm library in Cadence Innovus☆49Updated last year
- A complete open-source design-for-testing (DFT) Solution☆164Updated 2 months ago
- This is a tutorial on standard digital design flow☆78Updated 4 years ago
- ADC Performance Survey (ISSCC & VLSI Circuit Symposium)☆210Updated this week
- Hammer: Highly Agile Masks Made Effortlessly from RTL☆286Updated 3 months ago
- Qflow full end-to-end digital synthesis flow for ASIC designs☆217Updated 10 months ago
- Curriculum for a university course to teach chip design using open source EDA tools☆107Updated last year
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of raven_soc which was taped-out by Efables…☆37Updated 5 years ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆44Updated 4 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆75Updated last year
- Logic synthesis and ABC based optimization☆49Updated 2 weeks ago
- A PULP SoC for education, easy to understand and extend with a full flow for a physical design.☆131Updated last week
- ☆83Updated 2 years ago
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆162Updated 2 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆74Updated 4 years ago
- Home of the open-source EDA course.☆42Updated 2 months ago