ABKGroup / PROBE3.0
☆34Updated 5 months ago
Related projects: ⓘ
- ☆17Updated 3 years ago
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆21Updated last year
- SMT-based-STDCELL-Layout-Generator☆15Updated 2 years ago
- ☆46Updated last month
- Circuit release of the MAGICAL project☆28Updated 4 years ago
- ☆17Updated last year
- ☆29Updated 11 months ago
- Intel's Analog Detailed Router☆37Updated 5 years ago
- ☆76Updated 2 months ago
- Material for OpenROAD Tutorial at DAC 2020☆45Updated last year
- reference block design for the ASAP7nm library in Cadence Innovus☆30Updated 2 months ago
- ☆35Updated last week
- Verilog-A simulation models☆49Updated 3 weeks ago
- Bounded-Skew DME v1.3☆13Updated 6 years ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆23Updated 3 years ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆24Updated 2 years ago
- AIB Generator: Analog hardware compiler for AIB PHY☆28Updated 4 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆23Updated 3 years ago
- Incremental Timing-Driven Placement, problem C of ICCAD contest 2015☆13Updated 6 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆72Updated this week
- ☆26Updated 2 years ago
- ☆20Updated 2 years ago
- ☆19Updated 2 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆57Updated 3 years ago
- Artificial Netlist Generator☆29Updated 6 months ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆15Updated 4 years ago
- BAG2 workspace for fake PDK (cds_ff_mpt)☆52Updated 4 years ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆18Updated 3 months ago
- AMC: Asynchronous Memory Compiler☆44Updated 4 years ago
- PROTON - A Python Framework for Physics-Based Electromigration Assessment on Contemporary VLSI Power Grids☆12Updated last week