Alternatives and similar repositories for ascend-freepdk45

Users that are interested in ascend-freepdk45 are comparing it to the libraries listed below

• asyncvlsi / AMC
  AMC: Asynchronous Memory Compiler
  ☆50Updated 5 years ago
• lnis-uofu / FreePDK45-RRAM-Addon
  A RRAM addon for the NCSU FreePDK 45nm
  ☆23Updated 3 years ago
• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆37Updated 2 years ago
• The-OpenROAD-Project-Attic / OpenROAD-Utilities
  Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project
  ☆19Updated 6 years ago
• ReuelReuben / vsdSRAM
  SRAM
  ☆23Updated 5 years ago
• bsg-idea / uw_openroad_free45
  UW reference flow for Free45PDK and The OpenROAD Project
  ☆11Updated 5 years ago
• bojackchen / digital-flow
  This is a tutorial on standard digital design flow
  ☆78Updated 4 years ago
• RIOSLaboratory / OpenXRAM
  sram/rram/mram.. compiler
  ☆39Updated last year
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆39Updated 6 years ago
• spider-tronix / Standard-Cell-Characterization
  Open Source tool to build liberty files and for Characterizing Standard Cells.
  ☆27Updated 4 years ago
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆76Updated 4 years ago
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆49Updated 2 years ago
• rahulk29 / sram22
  A configurable SRAM generator
  ☆54Updated 2 weeks ago
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆61Updated last year
• shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK
  This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…
  ☆48Updated 4 years ago
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆47Updated 2 years ago
• woset-workshop / woset-workshop.github.io
  Workshop on Open-Source EDA Technology (WOSET)
  ☆48Updated 9 months ago
• bespoke-silicon-group / bsg_sv2v
  A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.
  ☆42Updated 2 years ago
• brabect1 / sta_basics_course
  Introductory course into static timing analysis (STA).
  ☆97Updated 2 months ago
• vsdip / vsdsram_sky130
  ☆42Updated 3 years ago
• stineje / CharLib
  Open-source repository for a standard-cell library characterizer using complete open-source tools
  ☆37Updated last month
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• The-OpenROAD-Project / TritonCTS
  Source codes and calibration scripts for clock tree synthesis
  ☆40Updated 5 years ago
• EECS150 / asic_labs_fa21
  ☆24Updated 3 years ago
• cornell-brg / pymtl3-net
  Project repo for the POSH on-chip network generator
  ☆50Updated 5 months ago
• JulianKemmerer / Drexel-ECEC575
  ☆19Updated 11 years ago
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆50Updated 4 months ago
• baichen318 / FreePDK45
  This is the FreePDK45 V1.4 Process Development Kit for the 45 nm technology
  ☆29Updated 4 years ago
• prasadp4009 / tbengy
  Python Tool for UVM Testbench Generation
  ☆54Updated last year
• verilator / uvm
  Universal Verification Methodology (UVM) base libraries, with edits for Verilator
  ☆27Updated 5 years ago