This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) implemented in 45nm CMOS technology.
☆208Nov 13, 2024Updated last year
Alternatives and similar repositories for Analog-Design-of-Asynchronous-SAR-ADC
Users that are interested in Analog-Design-of-Asynchronous-SAR-ADC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆85Jun 12, 2023Updated 2 years ago
- This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.☆43Mar 2, 2022Updated 4 years ago
- This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Pow…☆17Sep 12, 2023Updated 2 years ago
- This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using h…☆26May 2, 2025Updated 11 months ago
- This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A c…☆12Jul 8, 2019Updated 6 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- This project shows the design process of the main blocks of a typical RX frontend system.☆28Jan 2, 2021Updated 5 years ago
- This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.☆29Feb 21, 2019Updated 7 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆89Mar 19, 2026Updated last month
- A 10bit SAR ADC in Sky130☆35Dec 4, 2022Updated 3 years ago
- Design and implementation of an 8-bit SAR (Successive Approximation Register) ADC☆28Jun 12, 2018Updated 7 years ago
- Successive Approximation Register (SAR) ADC Digital Calibration (in Matlab)☆72Apr 9, 2018Updated 8 years ago
- This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs …☆20Apr 20, 2019Updated 6 years ago
- Model SAR ADC with python!☆22Jul 8, 2022Updated 3 years ago
- This project shows how to model a 10-bit pipeline ADC and a 10-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, …☆38Apr 7, 2019Updated 7 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Simulink model for noise shaping SAR ADC☆13Mar 17, 2020Updated 6 years ago
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆26May 30, 2024Updated last year
- HSPICE and MATLAB simulation files of a tracking SAR ADC☆26Jun 29, 2024Updated last year
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆31Jul 30, 2022Updated 3 years ago
- Schematic, Layout Design & Simulation in 180nm Technology☆23Nov 21, 2020Updated 5 years ago
- Digital Standard Cells based SAR ADC☆15Aug 5, 2021Updated 4 years ago
- 12-bit 10-KSPS Incremental Delta-Sigma ADC in Skywater 130 nm☆25May 13, 2023Updated 2 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC☆43Jun 13, 2023Updated 2 years ago
- This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.☆14Mar 17, 2019Updated 7 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- ADC Performance Survey (ISSCC & VLSI Circuit Symposium)☆271Mar 16, 2026Updated last month
- 9-bit SAR in skywater 130 nm☆17Jan 15, 2025Updated last year
- Our project involves the design of an 8-bit microprocessor data-path including 8-byte dual port memory, ALU and barrel shifter using CMOS…☆14Jan 2, 2021Updated 5 years ago
- Fundamental analog circuit designs to kick start and embark the journey in the world of IC design.☆33Aug 31, 2023Updated 2 years ago
- Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"☆198Oct 6, 2025Updated 6 months ago
- Open Analog Design Environment☆25May 19, 2023Updated 2 years ago
- PLL Designs on Skywater 130nm MPW☆25Dec 3, 2023Updated 2 years ago
- A case study of a continuous-time Delta-Sigma modulator including system-level simulations/design of the CT-DSM, circuit-design of the fr…☆12Updated this week
- This repository will maintain simulation files, layout files and other relevant files on the SAR ADC worked on in the VSD Summer Online I…☆20Dec 15, 2020Updated 5 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆11Apr 25, 2020Updated 5 years ago
- This project discusses the design procedure of a Low Dropout Voltage Regulator (LDO) circuit.☆22Feb 28, 2024Updated 2 years ago
- This repository includes the Resistive Random Access Memory (RRAM) Compiler which is designed in the context of the research project of D…☆79Oct 10, 2022Updated 3 years ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆75Apr 10, 2026Updated last week
- A RRAM addon for the NCSU FreePDK 45nm☆25Jan 10, 2022Updated 4 years ago
- Sandbox for experimenting with Ngspice and open PDKs in Google Colab☆30Jun 5, 2024Updated last year
- ☆16Jun 22, 2023Updated 2 years ago