muhammadaldacher / Analog-Design-of-1.9-GHz-PLL-system

This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.
57Updated last year

Related projects

Alternatives and complementary repositories for Analog-Design-of-1.9-GHz-PLL-system