muhammadaldacher / Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmpLinks
This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.
☆34Updated 3 years ago
Alternatives and similar repositories for Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp
Users that are interested in Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp are comparing it to the libraries listed below
Sorting:
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆74Updated 2 years ago
- This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…☆176Updated 10 months ago
- This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using h…☆17Updated 5 months ago
- This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.☆24Updated 6 years ago
- This project shows the design process of the main blocks of a typical RX frontend system.☆26Updated 4 years ago
- A 10bit SAR ADC in Sky130☆25Updated 2 years ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆56Updated this week
- ☆43Updated 3 years ago
- ☆83Updated 8 months ago
- This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A c…☆12Updated 6 years ago
- repository for a bandgap voltage reference in SKY130 technology☆40Updated 2 years ago
- This project shows how to model a 10-bit pipeline ADC and a 10-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, …☆33Updated 6 years ago
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆102Updated last year
- Solve one design problem each day for a month☆46Updated 2 years ago
- EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)☆165Updated 2 months ago
- Python script for generating lookup tables for the gm/ID design methodology and much more ...☆99Updated 5 months ago
- Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"☆161Updated 2 months ago
- This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.☆13Updated 6 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆74Updated 4 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆78Updated 4 years ago
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆73Updated 6 months ago
- PLL Designs on Skywater 130nm MPW☆21Updated last year
- Fully-differential asynchronous non-binary 12-bit SAR-ADC☆33Updated 2 years ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆65Updated last month
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆66Updated 3 years ago
- Advanced integrated circuits 2023☆32Updated last year
- ☆17Updated 3 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆43Updated 3 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆76Updated 3 years ago
- This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Pow…☆15Updated 2 years ago