Alternatives and similar repositories for Analog-Design-of-LDO-with-PMOS-pass-device

Users that are interested in Analog-Design-of-LDO-with-PMOS-pass-device are comparing it to the libraries listed below

• muhammadaldacher / Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp
  This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.
  ☆35Updated 3 years ago
• chennakeshavadasa / Low-dropout-Voltage-Regulator-LDO-using-SKY130PDK
  Design of LDO using open source SKY130PDK
  ☆13Updated last year
• sscs-ose / sscs-chipathon-2024
  ☆83Updated 9 months ago
• dreoilin / pygmid
  A python3 gm/ID starter kit
  ☆54Updated 2 months ago
• medwatt / gmid
  Python script for generating lookup tables for the gm/ID design methodology and much more ...
  ☆102Updated 6 months ago
• IHP-GmbH / IHP-AnalogAcademy
  ☆106Updated 3 weeks ago
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆41Updated 2 years ago
• ChrisZonghaoLi / gm_id_gf180mcu
  This repo contains introduction of gm/id method and its application to some OTA design examples.
  ☆18Updated last year
• bmurmann / Book-on-gm-ID-design
  Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"
  ☆163Updated 3 weeks ago
• wulffern / aicex
  Files for Advanced Integrated Circuits
  ☆31Updated 3 weeks ago
• muhammadaldacher / Analog-Design-of-1.9-GHz-PLL-system
  This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…
  ☆76Updated 2 years ago
• AbdelrahmanHassanMuhammed / Analog-IC-Design-Problems
  Solve one design problem each day for a month
  ☆48Updated 2 years ago
• simi1505 / SG13G2_ASIC-Design-Template
  SG13G2_ASIC-Design-Template
  ☆15Updated 2 months ago
• mabrains / PLL_design
  PLL Designs on Skywater 130nm MPW
  ☆22Updated last year
• gmagno / spyci
  A tiny Python package to parse spice raw data files.
  ☆53Updated 2 years ago
• mabrains / Analog_blocks
  Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.
  ☆28Updated 3 years ago
• dwarning / VA-Models
  Verilog-A simulation models
  ☆84Updated 2 months ago
• bmurmann / Ngspice-on-Colab
  Sandbox for experimenting with Ngspice and open PDKs in Google Colab
  ☆25Updated last year
• w32agobot / SKY130_SAR-ADC
  Fully-differential asynchronous non-binary 12-bit SAR-ADC
  ☆33Updated 2 years ago
• bmurmann / EE628
  EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)
  ☆167Updated 2 months ago
• ashwith / pyMOSChar
  Python port of Prof. Boris Murmann's gm/ID Starter Kit
  ☆54Updated 8 years ago
• wulffern / aic2023
  Advanced integrated circuits 2023
  ☆32Updated last year
• muhammadaldacher / Analog-Design-of-Asynchronous-SAR-ADC
  This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…
  ☆181Updated 11 months ago
• siddhantladdha / analog_daddy
  This library is an attempt to make transistor sizing for Analog design less painful.
  ☆20Updated 2 months ago
• iic-jku / analog-circuit-design
  Course material for a basic hands-on analog circuit design course with IC emphasis
  ☆152Updated last week
• cascode-labs / virtue
  A Python and SKILL Framework for Cadence Virtuoso
  ☆42Updated last year
• muhammadaldacher / RF-design-of-1.9-GHz-Rx-frontend
  This project shows the design process of the main blocks of a typical RX frontend system.
  ☆26Updated 4 years ago
• efabless / sky130_klayout_pdk
  Skywaters 130nm Klayout PDK
  ☆27Updated 9 months ago
• muhammadaldacher / RF-design-of-2.4-GHz-LNA
  This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.
  ☆12Updated 6 years ago
• UAH-IC-Design-Team / sky130-10-bit-SAR-ADC
  A 10bit SAR ADC in Sky130
  ☆25Updated 2 years ago