This project discusses the design procedure of a Low Dropout Voltage Regulator (LDO) circuit.
☆23Feb 28, 2024Updated 2 years ago
Alternatives and similar repositories for Analog-Design-of-LDO-with-PMOS-pass-device
Users that are interested in Analog-Design-of-LDO-with-PMOS-pass-device are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using h…☆26May 2, 2025Updated last year
- This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.☆44Mar 2, 2022Updated 4 years ago
- Design and implementation of an 8-bit SAR (Successive Approximation Register) ADC☆29Jun 12, 2018Updated 7 years ago
- An Open-Source ASIC Design Template for the SG13G2 IHP Open-PDK☆21Updated this week
- ☆100Nov 30, 2025Updated 5 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A collection of gmid scripts and Data to plot various parameters needed for gm/id based design methodology using open source tools and Go…☆15Nov 4, 2025Updated 6 months ago
- This repo contains introduction of gm/id method and its application to some OTA design examples.☆19Dec 5, 2023Updated 2 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC☆44Jun 13, 2023Updated 2 years ago
- Advanced Integrated Circuits 2024☆24Nov 16, 2024Updated last year
- Online viewer of Xschem schematic files☆29Dec 14, 2025Updated 4 months ago
- ☆13Mar 7, 2024Updated 2 years ago
- Blender GDSII Importer with PDK Support☆115May 3, 2026Updated last week
- Lumerical scripts for rapid geometry and simulation definition, bash scripts for remote-host Lumerical execution, and MATLAB scripts for …☆20Mar 23, 2026Updated last month
- Go Board FPGA Project for Ambient Light Sensor in VHDL and Verilog☆10Apr 20, 2019Updated 7 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- This project shows how to model a 10-bit pipeline ADC and a 10-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, …☆38Apr 7, 2019Updated 7 years ago
- A tapeout-ready structure for hierarchical analog design (v0.1).☆26Jan 16, 2026Updated 3 months ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆86Jun 12, 2023Updated 2 years ago
- This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…☆211Nov 13, 2024Updated last year
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆67Apr 28, 2026Updated last week
- ☆130May 1, 2026Updated last week
- Design a median filter for a Generic RGB image.☆14Mar 6, 2019Updated 7 years ago
- ADC Performance Survey (ISSCC & VLSI Circuit Symposium)☆279Mar 16, 2026Updated last month
- RTL Synthesis for Fast Arithmetic circuits like Booth encoded Multipliers, Carry Save Adders, Fixed-Point and Floating-Point conversions,…☆21Nov 26, 2018Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Programming assignments for Coursera's U of I VLSI CAD: Logic to Layout☆14May 11, 2014Updated 11 years ago
- Learn UVM by small projects☆21Aug 31, 2021Updated 4 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆90Mar 19, 2026Updated last month
- edX silicon photonics course☆12Mar 21, 2018Updated 8 years ago
- A FIFO or Queue is an array of memory commonly used in hardware to transfer transfer data between two circuits with different clocks. The…☆16Nov 5, 2017Updated 8 years ago
- **RISC**uinho - A scratch in the possibilities in the universe of microcontrollers☆26Mar 18, 2026Updated last month
- This repository contains a detailed description of how to generate parameterized cells using GDSFactory-based layout automation tool GLay…☆13Oct 14, 2024Updated last year
- A Fractional Divider with Delta-Sigma Modulator and Dual-Mode Divider for Phase-Locked Loop☆16Apr 25, 2021Updated 5 years ago
- nn2FPGA converts ONNX models into FPGA dataflow accelerators with seamless ONNX Runtime integration.☆21Apr 27, 2026Updated last week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Code for "Understanding Metastability in SAR ADCs: Part II: Asynchronous"☆12Apr 19, 2022Updated 4 years ago
- ☆12Nov 18, 2024Updated last year
- HSPICE and MATLAB simulation files of a tracking SAR ADC☆28Jun 29, 2024Updated last year
- Optimal gate sizing of digital circuits using geometric programming☆11Aug 18, 2016Updated 9 years ago
- Benchmark Generator for Global Routing☆13Jul 18, 2019Updated 6 years ago
- This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs …☆20Apr 20, 2019Updated 7 years ago
- An approach for Circuit Synthesis using Dataset Threshold queries.☆14May 28, 2023Updated 2 years ago