patrickschulz / openPCellsLinks
Parametric layout generator for digital, analog and mixed-signal integrated circuits
☆56Updated last week
Alternatives and similar repositories for openPCells
Users that are interested in openPCells are comparing it to the libraries listed below
Sorting:
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆54Updated 8 years ago
- repository for a bandgap voltage reference in SKY130 technology☆40Updated 2 years ago
- A tiny Python package to parse spice raw data files.☆53Updated 2 years ago
- LAYout with Gridded Objects v2☆63Updated 2 months ago
- Verilog-A simulation models☆79Updated last month
- Files for Advanced Integrated Circuits☆29Updated last week
- Python script for generating lookup tables for the gm/ID design methodology and much more ...☆96Updated 4 months ago
- A python3 gm/ID starter kit☆52Updated last month
- Skywater 130nm Klayout Device Generators PDK☆31Updated last year
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆48Updated last week
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆64Updated last week
- Sandbox for experimenting with Ngspice and open PDKs in Google Colab☆24Updated last year
- Circuit Automatic Characterization Engine☆51Updated 7 months ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆28Updated 3 years ago
- This repo contains introduction of gm/id method and its application to some OTA design examples.☆18Updated last year
- PLL Designs on Skywater 130nm MPW☆21Updated last year
- Read Spectre PSF files☆66Updated last month
- KLayout technology files for Skywater SKY130☆41Updated 2 years ago
- Hardware Description Library☆82Updated 5 months ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆71Updated 2 years ago
- BAG framework☆41Updated last year
- ☆84Updated 8 months ago
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆71Updated 5 months ago
- ☆19Updated last year
- This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.☆34Updated 3 years ago
- LAYout with Gridded Objects☆29Updated 5 years ago
- Gm Id Kit with GUI to Work with Matlab Data file similar to Prof. Boris Murmann's gm/ID Starter Kit☆47Updated 5 years ago
- A 10bit SAR ADC in Sky130☆25Updated 2 years ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆37Updated last month
- Automatic generation of real number models from analog circuits☆43Updated last year