muhammadaldacher / Modeling-of-4-bit-Flash-ADC-and-4-bit-DACLinks
This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs to construct the 4-bit ADC based on the flash architecture. Models are built in Cadence using ideal components & VerilogA blocks, & Analysis is done on Matlab.
☆15Updated 6 years ago
Alternatives and similar repositories for Modeling-of-4-bit-Flash-ADC-and-4-bit-DAC
Users that are interested in Modeling-of-4-bit-Flash-ADC-and-4-bit-DAC are comparing it to the libraries listed below
Sorting:
- This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Pow…☆15Updated last year
- This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…☆172Updated 9 months ago
- This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specificatio…☆19Updated last year
- This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.☆14Updated 6 years ago
- 5 Day TCL begginer to advanced training workshop by VSD☆18Updated last year
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆72Updated 2 years ago
- This project shows how to model a 10-bit pipeline ADC and a 10-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, …☆32Updated 6 years ago
- ☆15Updated 2 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆74Updated 4 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆65Updated 2 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆75Updated last year
- I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.☆24Updated 2 years ago
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆12Updated last year
- This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…☆24Updated last year
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆21Updated last week
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆48Updated 4 years ago
- EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)☆163Updated 3 weeks ago
- Solve one design problem each day for a month☆46Updated 2 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆41Updated 3 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…