Alternatives and similar repositories for sun_sar9b_sky130nm

Users that are interested in sun_sar9b_sky130nm are comparing it to the libraries listed below

• wulffern / aic2024
  Advanced Integrated Circuits 2024
  ☆25Updated 6 months ago
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆38Updated 2 years ago
• mabrains / PLL_design
  PLL Designs on Skywater 130nm MPW
  ☆20Updated last year
• bmurmann / Ngspice-on-Colab
  Sandbox for experimenting with Ngspice and open PDKs in Google Colab
  ☆21Updated last year
• vsdip / avsddac_3v3_sky130_v1
  ☆12Updated 3 years ago
• iic-jku / SKY130_SAR-ADC1
  Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
  ☆41Updated 2 months ago
• ChrisZonghaoLi / gm_id_gf180mcu
  This repo contains introduction of gm/id method and its application to some OTA design examples.
  ☆14Updated last year
• UAH-IC-Design-Team / sky130-10-bit-SAR-ADC
  A 10bit SAR ADC in Sky130
  ☆23Updated 2 years ago
• mabrains / Analog_blocks
  Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.
  ☆27Updated 2 years ago
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆30Updated last year
• vsdip / avsddac_3v3_sky130_v2
  ☆16Updated 2 years ago
• muhammadaldacher / RF-design-of-2.4-GHz-LNA
  This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.
  ☆14Updated 6 years ago
• AbdelrahmanHassanMuhammed / Analog-IC-Design-Problems
  Solve one design problem each day for a month
  ☆43Updated 2 years ago
• dreoilin / pygmid
  A python3 gm/ID starter kit
  ☆48Updated 9 months ago
• efabless / cace
  Circuit Automatic Characterization Engine
  ☆49Updated 4 months ago
• mabrains / OpenAnalogDesign
  Open Analog Design Environment
  ☆24Updated 2 years ago
• muhammadaldacher / Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp
  This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.
  ☆31Updated 3 years ago
• VardhanSuroshi / VLSI-ASIC-Design-Flow
  This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specificatio…
  ☆12Updated last year
• iic-jku / Circuit-Designers-Etiquette
  A set of rules and recommendations for analog and digital circuit designers.
  ☆28Updated 7 months ago
• StefanSchippers / xschem_sky130
  XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
  ☆63Updated 2 weeks ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• vsdip / vsdsram_sky130
  ☆41Updated 3 years ago
• shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK
  This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…
  ☆44Updated 3 years ago
• efabless / caravel_user_project_analog
  ☆46Updated 4 months ago
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆48Updated last month
• wulffern / aicex
  Files for Advanced Integrated Circuits
  ☆28Updated last week
• sscs-ose / sscs-ose-chipathon.github.io
  ☆79Updated 4 months ago
• Geetima2021 / PLL-IC-design-using-Open-Source-PDK-Google-Skywater-130nm
  This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.
  ☆20Updated 3 years ago
• muhammadaldacher / Analog-Design-of-Bootstrapped-Switch
  This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A c…
  ☆11Updated 5 years ago
• ashwith / pyMOSChar
  Python port of Prof. Boris Murmann's gm/ID Starter Kit
  ☆54Updated 7 years ago