Alternatives and similar repositories for Analog-design-of-4-bit-current-steering-DACs:

Users that are interested in Analog-design-of-4-bit-current-steering-DACs are comparing it to the libraries listed below

• vsdip / avsddac_3v3_sky130_v1
  ☆12Updated 2 years ago
• muhammadaldacher / Analog-design-of-10-GbaseKR-high-speed-serial-link-transceiver-in-65-nm-CMOS
  This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.
  ☆23Updated 6 years ago
• muhammadaldacher / Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp
  This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.
  ☆31Updated 3 years ago
• vsdip / avsddac_3v3_sky130_v2
  ☆16Updated 2 years ago
• ADC-TEAM2020 / avsdadc_3v3
  This repository will maintain simulation files, layout files and other relevant files on the SAR ADC worked on in the VSD Summer Online I…
  ☆19Updated 4 years ago
• muhammadaldacher / RF-design-of-1.9-GHz-Rx-frontend
  This project shows the design process of the main blocks of a typical RX frontend system.
  ☆23Updated 4 years ago
• ucdrstdenis / cdsAsync
  cdsAsync: An Asynchronous QDI VLSI Toolset & Schematic Library
  ☆25Updated 5 years ago
• vsdip / vsdsram_sky130
  ☆40Updated 3 years ago
• mabrains / PLL_design
  PLL Designs on Skywater 130nm MPW
  ☆20Updated last year
• muhammadaldacher / RF-design-of-2.4-GHz-LNA
  This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.
  ☆14Updated 6 years ago
• vsdip / vsdflow
  VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…
  ☆16Updated 4 years ago
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆38Updated 2 years ago
• pradeepsk13 / vsdsram_sky130_1.8V
  Design of 4KB Static RAM 1.8V (access time <2.5ns) using OpenRAM and Sky130 node
  ☆14Updated 4 years ago
• vsdip / vsdStdCellCharacterizer_sky130
  ☆20Updated 3 years ago
• muhammadaldacher / Layout-Design-for-an-8-bit-Microprocessor
  Our project involves the design of an 8-bit microprocessor data-path including 8-byte dual port memory, ALU and barrel shifter using CMOS…
  ☆14Updated 4 years ago
• westonb / sky130-analog
  Analog and power building blocks for sky130 pdk
  ☆20Updated 4 years ago
• vsdip / rvmyth_avsddac_interface
  ☆14Updated 3 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆35Updated 2 years ago
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆30Updated last year
• d-m-bailey / cvc
  CVC: Circuit Validity Checker. Check for errors in CDL netlist.
  ☆22Updated 3 months ago
• UAH-IC-Design-Team / sky130-10-bit-SAR-ADC
  A 10bit SAR ADC in Sky130
  ☆22Updated 2 years ago
• Deepak42074 / vsdsram_sky130
  Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns
  ☆12Updated 4 years ago
• proppy / conda-eda
  Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.
  ☆8Updated last year
• r09g / iadc
  12-bit 10-KSPS Incremental Delta-Sigma ADC in Skywater 130 nm
  ☆18Updated last year
• mabrains / Analog_blocks
  Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.
  ☆27Updated 2 years ago
• dineshannayya / riscduino_dcore
  ☆12Updated 9 months ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• mnasser431998 / bfu_dif_fft_rtl
  The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor
  ☆14Updated 2 years ago
• efabless / caravel_board
  ☆34Updated 5 months ago
• USCPOSH / AMS_KGD
  A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.
  ☆36Updated 3 years ago