This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using high-swing cascode current mirror structures for the current source arrays.
☆24May 2, 2025Updated 10 months ago
Alternatives and similar repositories for Analog-design-of-4-bit-current-steering-DACs
Users that are interested in Analog-design-of-4-bit-current-steering-DACs are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs …☆18Apr 20, 2019Updated 6 years ago
- This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Pow…☆15Sep 12, 2023Updated 2 years ago
- This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.☆42Mar 2, 2022Updated 4 years ago
- This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A c…☆12Jul 8, 2019Updated 6 years ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆82Jun 12, 2023Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…☆198Nov 13, 2024Updated last year
- This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.☆29Feb 21, 2019Updated 7 years ago
- This project shows the design process of the main blocks of a typical RX frontend system.☆27Jan 2, 2021Updated 5 years ago
- This project discusses the design procedure of a Low Dropout Voltage Regulator (LDO) circuit.☆22Feb 28, 2024Updated 2 years ago
- This project shows how to model a 10-bit pipeline ADC and a 10-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, …☆37Apr 7, 2019Updated 6 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆54Mar 13, 2025Updated last year
- Our project involves the design of an 8-bit microprocessor data-path including 8-byte dual port memory, ALU and barrel shifter using CMOS…☆14Jan 2, 2021Updated 5 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆86Mar 19, 2026Updated last week
- This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.☆14Mar 17, 2019Updated 7 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Schematic, Layout Design & Simulation in 180nm Technology☆22Nov 21, 2020Updated 5 years ago
- 9-bit SAR in skywater 130 nm☆17Jan 15, 2025Updated last year
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆40Jun 10, 2021Updated 4 years ago
- From Pytorch model to C++ for Vitis HLS☆20Mar 18, 2026Updated last week
- Advanced integrated circuits 2023☆32Feb 25, 2024Updated 2 years ago
- This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specificatio…☆30Jan 23, 2024Updated 2 years ago
- repository for a bandgap voltage reference in SKY130 technology☆42Jan 20, 2023Updated 3 years ago
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆25May 30, 2024Updated last year
- ☆17Sep 19, 2022Updated 3 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- ☆41Feb 28, 2022Updated 4 years ago
- This project was done as a part of Beginner VLSI/SoC Physical design using open-source EDA Tools workshop.☆11Nov 23, 2020Updated 5 years ago
- IHP Open source SG13G2 Tape Out on April 2025 [Testfield T586]☆13Sep 25, 2025Updated 6 months ago
- Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory…☆31Oct 18, 2018Updated 7 years ago
- This repository will maintain simulation files, layout files and other relevant files on the SAR ADC worked on in the VSD Summer Online I…☆20Dec 15, 2020Updated 5 years ago
- ☆97Nov 30, 2025Updated 4 months ago
- Go Board FPGA Project for Ambient Light Sensor in VHDL and Verilog☆10Apr 20, 2019Updated 6 years ago
- A 10bit SAR ADC in Sky130☆34Dec 4, 2022Updated 3 years ago
- The project involves the design of a 4X4 (16-bit) SRAM Memory Array using Cadence Virtuoso☆60Mar 21, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- SPICE based IBIS simulation☆17Jan 2, 2025Updated last year
- ☆12Jan 25, 2023Updated 3 years ago
- Files for Advanced Integrated Circuits☆38Mar 1, 2026Updated 3 weeks ago
- ☆12Dec 11, 2023Updated 2 years ago
- ☆15Jun 22, 2023Updated 2 years ago
- Integrated Circuit Design - IC Design Flow and Project-Based Learning☆50Mar 1, 2026Updated 3 weeks ago
- This repository contains all the materials related to the basic MOSFET theory, CMOS technology, circuit and layout design, and basic PDK …☆14Dec 15, 2023Updated 2 years ago