Successive Approximation Register (SAR) ADC Digital Calibration (in Matlab)
☆74Apr 9, 2018Updated 8 years ago
Alternatives and similar repositories for Digital-Calibration-of-SAR-ADC
Users that are interested in Digital-Calibration-of-SAR-ADC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- HSPICE and MATLAB simulation files of a tracking SAR ADC☆29Jun 29, 2024Updated 2 years ago
- This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…☆226Nov 13, 2024Updated last year
- Code for "Understanding Metastability in SAR ADCs: Part II: Asynchronous"☆12Apr 19, 2022Updated 4 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC☆44Jun 13, 2023Updated 3 years ago
- Basic Simulink Blocks for modeling CDRs and PLLs☆16Apr 25, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆31May 30, 2024Updated 2 years ago
- ADC Performance Survey (ISSCC & VLSI Circuit Symposium)☆302Mar 16, 2026Updated 4 months ago
- ☆10Aug 15, 2019Updated 6 years ago
- Delta-Sigma modulator (DSM) for fractional phase locked loop.☆36May 28, 2021Updated 5 years ago
- Velocity Measurement by Doppler Radar implemented on Matlab☆12Nov 24, 2017Updated 8 years ago
- Governance-related CHIPS Alliance documents, guides etc.☆10Feb 20, 2023Updated 3 years ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆94Jun 12, 2023Updated 3 years ago
- This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A c…☆13Jul 8, 2019Updated 7 years ago
- A 10bit SAR ADC in Sky130☆40Dec 4, 2022Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- This repository will maintain simulation files, layout files and other relevant files on the SAR ADC worked on in the VSD Summer Online I…☆21Dec 15, 2020Updated 5 years ago
- This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.☆44Mar 2, 2022Updated 4 years ago
- ☆82Jul 3, 2024Updated 2 years ago
- USB Full Speed PHY☆49May 3, 2020Updated 6 years ago
- ☆11Apr 25, 2020Updated 6 years ago
- ☆14May 11, 2022Updated 4 years ago
- 12-bit 10-KSPS Incremental Delta-Sigma ADC in Skywater 130 nm☆26May 13, 2023Updated 3 years ago
- Little handy Numerically controlled oscillator (NCO) Verilog RTL☆15Feb 15, 2024Updated 2 years ago
- Hardware monorepo avionics PCB☆14Updated this week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"☆223Oct 6, 2025Updated 9 months ago
- The repository contains the MATLAB-based model of IEEE 802.11ad physical layer in baseband.☆22Jan 27, 2020Updated 6 years ago
- The codes are used to generate the VerilogA code which can be directly used in the spectre simulation .The generated VerilogA code's fuct…☆57Dec 16, 2025Updated 7 months ago
- Repository of Matlab tools for analysis of wireline signal integrity and transceiver simulation☆14Apr 25, 2020Updated 6 years ago
- All Digital Phase-Locked Loop☆14May 22, 2023Updated 3 years ago
- Design, fabrication, and assembly files for CMOS imaging sensor PCB☆15Mar 16, 2017Updated 9 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆91Mar 19, 2026Updated 4 months ago
- A toolbox for ADC modeling, testing, analysis, and calibration, etc.☆130Jul 9, 2026Updated 3 weeks ago
- 基于MATLAB的OFDM仿真，包含了BPSK、QPSK、QAM调制方式和解调，以及AWGN高斯白噪声信道和TDL信道☆18Jan 31, 2024Updated 2 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Digital Standard Cells based SAR ADC☆15Aug 5, 2021Updated 4 years ago
- An automatic test pattern generation (ATPG) and fault simulation system.☆12Sep 9, 2019Updated 6 years ago
- A tiny Python package to parse spice raw data files.☆54Dec 26, 2022Updated 3 years ago
- All-Digital Phase-Locked Loops (ADPLL) code in High Speed Integrated Circuit Hardware Description Language (VHDL) for a Field Programmabl…☆13Oct 20, 2025Updated 9 months ago
- Python Verilog-AMS Parser☆12Oct 13, 2015Updated 10 years ago
- SoCGen is a tool that automates SoC design by taking in a JSON description of the system and producing the final GDS-II. SoCGen supports …☆40Dec 4, 2020Updated 5 years ago
- PAST SHORT COURSES AND TUTORIALS FROM ISSCC.☆17Apr 7, 2024Updated 2 years ago