Alternatives and similar repositories for SKY130_SAR-ADC

Users that are interested in SKY130_SAR-ADC are comparing it to the libraries listed below

• UAH-IC-Design-Team / sky130-10-bit-SAR-ADC
  A 10bit SAR ADC in Sky130
  ☆25Updated 2 years ago
• muhammadaldacher / Analog-Design-of-1.9-GHz-PLL-system
  This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…
  ☆72Updated 2 years ago
• muhammadaldacher / Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp
  This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.
  ☆33Updated 3 years ago
• medwatt / gmid
  Python script for generating lookup tables for the gm/ID design methodology and much more ...
  ☆96Updated 4 months ago
• ADC-TEAM2020 / avsdadc_3v3
  This repository will maintain simulation files, layout files and other relevant files on the SAR ADC worked on in the VSD Summer Online I…
  ☆20Updated 4 years ago
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆39Updated 2 years ago
• bmurmann / EE628
  EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)
  ☆163Updated 3 weeks ago
• AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop
  Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
  ☆65Updated 2 years ago
• muhammadaldacher / Analog-Design-of-Asynchronous-SAR-ADC
  This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…
  ☆172Updated 9 months ago
• muhammadaldacher / Analog-design-of-10-GbaseKR-high-speed-serial-link-transceiver-in-65-nm-CMOS
  This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.
  ☆24Updated 6 years ago
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆30Updated last year
• vsdip / vsdsram_sky130
  ☆42Updated 3 years ago
• sscs-ose / sscs-chipathon-2024
  ☆84Updated 7 months ago
• mabrains / PLL_design
  PLL Designs on Skywater 130nm MPW
  ☆21Updated last year
• muhammadaldacher / RF-design-of-2.4-GHz-LNA
  This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.
  ☆14Updated 6 years ago
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆75Updated 4 years ago
• bmurmann / Book-on-gm-ID-design
  Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"
  ☆158Updated 3 weeks ago
• efabless / cace
  Circuit Automatic Characterization Engine
  ☆50Updated 6 months ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK
  This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…
  ☆48Updated 4 years ago
• abdelazeem201 / Cadence-RTL-to-GDSII-Flow
  In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.
  ☆75Updated last year
• iic-jku / osic-multitool
  JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
  ☆68Updated 5 months ago
• muhammadaldacher / RF-design-of-1.9-GHz-Rx-frontend
  This project shows the design process of the main blocks of a typical RX frontend system.
  ☆25Updated 4 years ago
• patrickschulz / openPCells
  Parametric layout generator for digital, analog and mixed-signal integrated circuits
  ☆56Updated 2 weeks ago
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆74Updated 4 years ago
• StefanSchippers / xschem_sky130
  XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
  ☆64Updated last month
• abdelazeem201 / Design-and-ASIC-Implementation-of-32-Point-FFT-Processor
  I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …
  ☆46Updated last year
• sscs-ose / sscs-ose-code-a-chip.github.io
  IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)
  ☆187Updated 3 months ago
• iic-jku / analog-circuit-design
  Course material for a basic hands-on analog circuit design course with IC emphasis
  ☆137Updated 3 weeks ago
• efabless / foss-asic-tools
  FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…
  ☆95Updated last year