ACM TODAES Best Paper Award, 2022
☆34Oct 24, 2023Updated 2 years ago
Alternatives and similar repositories for AutoDSE
Users that are interested in AutoDSE are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆62Aug 4, 2023Updated 2 years ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Oct 3, 2023Updated 2 years ago
- LLM-DSE: Searching Accelerator Parameters with LLM Agents☆13May 22, 2025Updated 11 months ago
- ICCAD'23 Best Paper Award candidate: Robust GNN-based Representation Learning for HLS☆24May 23, 2024Updated last year
- HLSyn benchmark for paper "Towards a Comprehensive Benchmark for FPGA Targeted High-Level Synthesis"☆30Dec 13, 2023Updated 2 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- LLM4HWDesign Starting Toolkit☆19Oct 4, 2024Updated last year
- ☆12Aug 5, 2023Updated 2 years ago
- An HBM FPGA based SpMV Accelerator☆18Aug 29, 2024Updated last year
- AutoSA: Polyhedral-Based Systolic Array Compiler☆240Dec 8, 2022Updated 3 years ago
- [FPGA 2024] Source code and bitstream for LevelST: Stream-based Accelerator for Sparse Triangular Solver☆15Jun 1, 2025Updated 11 months ago
- A collection of URLs related to High Level Synthesis (HLS).☆13Jun 26, 2021Updated 4 years ago
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆129Dec 20, 2022Updated 3 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Jan 3, 2023Updated 3 years ago
- HeteroGen: transpiling C to heterogeneous HLS code with automated test generation and program repair (ASPLOS 2022)☆16Sep 25, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Accelerated Image Reconstruction using Generative Adversarial Networks on Cloud FPGAs☆11Aug 27, 2021Updated 4 years ago
- Dataset for ML-guided Accelerator Design☆44Nov 18, 2024Updated last year
- ☆35Mar 1, 2019Updated 7 years ago
- HeteroCL-MLIR dialect for accelerator design☆42Sep 18, 2024Updated last year
- Stencil with Optimized Dataflow Architecture☆18Feb 27, 2024Updated 2 years ago
- ☆72Feb 16, 2023Updated 3 years ago
- Falcon Merlin Compiler☆41Jun 12, 2020Updated 5 years ago
- FPGA acceleration of arbitrary precision floating point computations.☆41May 17, 2022Updated 3 years ago
- Systolic array based hardware for Image processing on the SPARTAN-6 FPGA☆13May 26, 2016Updated 9 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".☆205Nov 14, 2021Updated 4 years ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆169Mar 12, 2026Updated last month
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆94Jul 26, 2024Updated last year
- Memory Compiler Tutorial☆14Oct 7, 2020Updated 5 years ago
- Large-scale medical image processing and reconstruction toolbox☆18Feb 13, 2024Updated 2 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆25Nov 29, 2024Updated last year
- ☆14Feb 14, 2022Updated 4 years ago
- ☆19Feb 18, 2021Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆382Jan 20, 2025Updated last year
- ☆22Jan 12, 2024Updated 2 years ago
- Eyeriss chip simulator☆40Mar 6, 2020Updated 6 years ago
- A simple 591 crawler (outdated)☆10Oct 2, 2021Updated 4 years ago
- ☆21Sep 22, 2024Updated last year
- ☆30Apr 26, 2019Updated 7 years ago
- ☆29Jun 10, 2019Updated 6 years ago