Alternatives and similar repositories for AutoDSE

Users that are interested in AutoDSE are comparing it to the libraries listed below

• UCLA-VAST / GNN-DSE
  DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"
  ☆40Updated 2 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆92Updated last year
• synergy-noc-generators / Proteus
  ☆10Updated 3 years ago
• sharc-lab / LightningSim
  A fast, accurate trace-based simulator for High-Level Synthesis.
  ☆73Updated last month
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆47Updated 3 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆84Updated 4 years ago
• UCLA-VAST / FlexCNN
  ☆72Updated 2 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆67Updated 4 years ago
• linghaosong / Serpens
  An HBM FPGA based SpMV Accelerator
  ☆17Updated last year
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆50Updated 11 months ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆47Updated 3 years ago
• pku-dasys / easymac
  ☆18Updated 4 years ago
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆62Updated 3 months ago
• pku-liang / TensorLib
  A Spatial Accelerator Generation Framework for Tensor Algebra.
  ☆61Updated 4 years ago
• maestro-project / gamma
  ☆42Updated last year
• arc-research-lab / AIM
  AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…
  ☆24Updated 8 months ago
• GATECH-EIC / DNN-Chip-Predictor
  [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…
  ☆25Updated 3 years ago
• hngenc / stellar
  ☆33Updated last year
• diwu1990 / UnarySim
  This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…
  ☆46Updated 6 months ago
• pku-liang / HASCO
  agile hardware-software co-design
  ☆52Updated 4 years ago
• jha-lab / codebench
  [TECS'23] A project on the co-design of Accelerators and CNNs.
  ☆21Updated 3 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆64Updated 7 months ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆22Updated 3 years ago
• VeriGOOD-ML / public
  ☆65Updated 9 months ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆30Updated 4 years ago
• UIUC-ChenLab / Nimblock
  ☆13Updated 2 years ago
• sharc-lab / FPGA_ECE8893
  ☆45Updated last week
• PSCLab-ASU / Systolic-CNN
  ☆17Updated 4 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆62Updated 10 months ago