Alternatives and similar repositories for T-DLA

Users that are interested in T-DLA are comparing it to the libraries listed below

• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• microideax / Open-Dnn
  ☆29Updated 6 years ago
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆56Updated 3 months ago
• pku-liang / HASCO
  agile hardware-software co-design
  ☆50Updated 3 years ago
• suchandler96 / gem5-NVDLA
  ☆33Updated 4 months ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆64Updated 3 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆46Updated 3 years ago
• he-actlab / polymath
  ☆21Updated 5 months ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆30Updated 3 years ago
• Accelergy-Project / processing-in-memory-design
  ☆25Updated last year
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆80Updated 6 years ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆121Updated 2 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆81Updated last year
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• sfu-arch / SpGEMM
  ☆36Updated 4 years ago
• UCLA-VAST / FlexCNN
  ☆72Updated 2 years ago
• xuanyoya / Interstellar-CNN-scheduler
  Tool for optimize CNN blocking
  ☆94Updated 5 years ago
• tissue3 / EyerissSimulator
  Eyeriss chip simulator
  ☆36Updated 5 years ago
• horizon-research / systolic-array-dataflow-optimizer
  A general framework for optimizing DNN dataflow on systolic array
  ☆39Updated 4 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆92Updated last year
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆46Updated 5 months ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆94Updated 10 months ago
• union-codesign / union
  ☆14Updated 3 years ago
• meton-robean / Vector_MulAdd_Accelerator
  vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器
  ☆53Updated 5 years ago
• UCLA-VAST / heterohalide
  HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration
  ☆15Updated 4 years ago
• BradMcDanel / column-combine
  ☆27Updated 5 years ago
• cornell-zhang / allo-pldi24-artifact
  Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"
  ☆28Updated last year
• he-actlab / planaria.code
  ☆28Updated 3 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆37Updated 5 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago