he-actlab / polymathLinks
☆22Updated 8 months ago
Alternatives and similar repositories for polymath
Users that are interested in polymath are comparing it to the libraries listed below
Sorting:
- ☆25Updated last year
- ☆14Updated 4 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆24Updated 11 months ago
- agile hardware-software co-design☆52Updated 3 years ago
- A reference implementation of the Mind Mappings Framework.☆30Updated 3 years ago
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆18Updated 3 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- Domain-Specific Architecture Generator 2☆22Updated 3 years ago
- EQueue Dialect☆40Updated 3 years ago
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Updated 2 years ago
- A graph linear algebra overlay☆51Updated 2 years ago
- ☆36Updated 7 months ago
- Docker container with tools for the Timeloop/Accelergy tutorial☆22Updated last year
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Updated 5 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆58Updated 2 weeks ago
- ☆36Updated 4 years ago
- Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"☆29Updated last year
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Updated 2 years ago
- ☆13Updated last year
- ☆32Updated 4 years ago
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆20Updated last year
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆29Updated 2 years ago
- A simulation framework for modeling efficiency of Graph Neural Network Dataflows☆23Updated 8 months ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Updated 2 years ago
- ☆13Updated 3 years ago
- ☆66Updated 4 years ago
- A Generic Distributed Auto-Tuning Infrastructure☆22Updated 4 years ago
- Fibertree emulator☆15Updated 11 months ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆66Updated 4 years ago
- A Toy-Purpose TPU Simulator☆19Updated last year