Alternatives and similar repositories for polymath:

Users that are interested in polymath are comparing it to the libraries listed below

• pku-liang / HASCO
  agile hardware-software co-design
  ☆47Updated 3 years ago
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆23Updated 3 months ago
• union-codesign / union
  ☆15Updated 3 years ago
• sfu-arch / SpGEMM
  ☆34Updated 3 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 2 years ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated last year
• Accelergy-Project / processing-in-memory-design
  ☆26Updated 11 months ago
• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆51Updated last year
• Fibertree-Project / fibertree
  Fibertree emulator
  ☆12Updated 4 months ago
• Xilinx / hydra
  ☆12Updated 3 years ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆29Updated 3 years ago
• dovedevic / blimp
  A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.
  ☆18Updated 2 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago
• cornell-zhang / uptune
  A Generic Distributed Auto-Tuning Infrastructure
  ☆22Updated 3 years ago
• UCLA-VAST / AutoDSE
  ACM TODAES Best Paper Award, 2022
  ☆24Updated last year
• CMU-SAFARI / SPARTA
  A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…
  ☆18Updated last year
• priyanka-raina / dnn-accelerator
  ☆13Updated 4 years ago
• jinhachung / tptpu-sim
  A Toy-Purpose TPU Simulator
  ☆15Updated 9 months ago
• UCLA-VAST / heterohalide
  HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration
  ☆15Updated 4 years ago
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• he-actlab / planaria.code
  ☆25Updated 3 years ago
• OSU-STARLAB / GPGPU-Ramulator-Simulator
  Replace original DRAM model in GPGPU-sim with Ramulator DRAM model
  ☆18Updated 6 years ago
• sharc-lab / LightningSim
  A fast, accurate trace-based simulator for High-Level Synthesis.
  ☆45Updated this week
• linghaosong / Serpens
  An HBM FPGA based SpMV Accelerator
  ☆13Updated 6 months ago
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆62Updated last year
• arc-research-lab / AIM
  AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…
  ☆22Updated 2 weeks ago
• GramThanos / CPU-on-Vivado-HLS
  A simple MIPS-like CPU demo in C++ for Xilinx Vivado HLS
  ☆18Updated 5 years ago
• maestro-project / gamma
  ☆39Updated 8 months ago
• hngenc / stellar
  ☆24Updated 4 months ago