hillhao / PYNQ-projectLinks
PYNQ, Neural network Language model, Overlay
☆110Updated 6 years ago
Alternatives and similar repositories for PYNQ-project
Users that are interested in PYNQ-project are comparing it to the libraries listed below
Sorting:
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆107Updated 7 years ago
- ☆90Updated 5 years ago
- ☆249Updated 4 years ago
- Computer Vision Overlays on Pynq☆187Updated 6 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆112Updated 5 years ago
- Xilinx Deep Learning IP☆94Updated 4 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆280Updated 5 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆154Updated 5 years ago
- A convolutional neural network implemented in hardware (verilog)☆161Updated 8 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆185Updated 8 years ago
- DPU on PYNQ☆228Updated last month
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆98Updated last year
- FPGA implementation of Cellular Neural Network (CNN)☆142Updated 7 years ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆106Updated 2 years ago
- ☆83Updated 5 years ago
- ☆29Updated 7 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆74Updated 7 years ago
- This project is trying to create a base vitis platform to run with DPU☆48Updated 5 years ago
- ☆109Updated 6 years ago
- Vitis HLS Library for FINN☆208Updated last week
- Convolution Neural Network of vgg19 model in verilog☆49Updated 7 years ago
- Convolutional Neural Network Using High Level Synthesis☆88Updated 5 years ago
- Pynq projects and guides☆29Updated 7 years ago
- Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…☆265Updated 2 years ago
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆111Updated 7 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53Updated 7 years ago
- hls code zynq 7020 pynq z2 CNN☆84Updated 6 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆241Updated 6 years ago
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆40Updated 3 years ago