rval735 / bisunaU50Links
BiSUNA framework specialized to compile for the Xilinx Alveo U50
☆13Updated 5 years ago
Alternatives and similar repositories for bisunaU50
Users that are interested in bisunaU50 are comparing it to the libraries listed below
Sorting:
- [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…☆16Updated 3 years ago
- ☆22Updated 9 months ago
- ☆19Updated 6 years ago
- ☆13Updated last year
- ☆16Updated 4 years ago
- ☆13Updated 3 years ago
- CoMeT is a new low-cost RowHammer mitigation that uses Count-Min Sketch-based aggressor row tracking, as described in our HPCA'24 paper h…☆10Updated last year
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆24Updated 4 years ago
- ACM TODAES Best Paper Award, 2022☆32Updated 2 years ago
- ☆25Updated last year
- A synthesis flow for hybrid processing-in-RRAM modes☆12Updated 4 years ago
- ☆64Updated 5 years ago
- ☆23Updated 4 years ago
- This simulator models multi core systems, intended primarily for studies on main memory management techniques. It models a trace-based ou…☆11Updated 9 years ago
- ☆18Updated 3 weeks ago
- ☆71Updated 5 years ago
- Binary Neural Network-based COVID-19 Face-Mask Wear and Positioning Predictor on Edge Devices☆12Updated 4 years ago
- A Generic Distributed Auto-Tuning Infrastructure☆22Updated 4 years ago
- Systolic-array based Deep Learning Accelerator generator☆27Updated 5 years ago
- ☆36Updated 4 years ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆19Updated 6 years ago
- ☆17Updated 4 years ago
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Updated 5 years ago
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆117Updated 5 months ago
- 16 bit serial multiplier in SystemVerilog☆13Updated 7 years ago
- Designs for finalist teams of the DAC System Design Contest☆37Updated 5 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆61Updated last month
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Updated 2 years ago
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆22Updated 2 months ago
- ☆19Updated 4 years ago