Alternatives and similar repositories for bisunaU50

Users that are interested in bisunaU50 are comparing it to the libraries listed below

• microideax / T-DLA
  ☆19Updated 5 years ago
• he-actlab / polymath
  ☆22Updated 8 months ago
• Hosseinabady / SDSoC-Benchmarks
  ☆16Updated 4 years ago
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆23Updated 4 years ago
• sfu-arch / SpGEMM
  ☆36Updated 4 years ago
• Xilinx / hydra
  ☆13Updated 3 years ago
• CMU-SAFARI / MemSchedSim
  This simulator models multi core systems, intended primarily for studies on main memory management techniques. It models a trace-based ou…
  ☆11Updated 9 years ago
• CMU-SAFARI / CoMeT
  CoMeT is a new low-cost RowHammer mitigation that uses Count-Min Sketch-based aggressor row tracking, as described in our HPCA'24 paper h…
  ☆10Updated last year
• Accelergy-Project / processing-in-memory-design
  ☆25Updated last year
• pgroupATusc / fasthash
  Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020
  ☆25Updated 3 years ago
• flasonil / Serial-Multiplier
  16 bit serial multiplier in SystemVerilog
  ☆12Updated 7 years ago
• harvard-acc / EdgeBERT
  HW/SW co-design of sentence-level energy optimizations for latency-aware multi-task NLP inference
  ☆52Updated last year
• amin-norollah / PAT-Noxim
  cycle accurate Network-on-Chip Simulator
  ☆31Updated 2 years ago
• maswx / vu13p_corundum
  corundum work on vu13p
  ☆22Updated last year
• GATECH-EIC / Auto-NBA
  [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…
  ☆15Updated 3 years ago
• ACADLab / SA-DS
  ☆13Updated last year
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 3 years ago
• yzwangfeng / reram-synthesis
  A synthesis flow for hybrid processing-in-RRAM modes
  ☆12Updated 4 years ago
• NaelF / BinaryCoP
  Binary Neural Network-based COVID-19 Face-Mask Wear and Positioning Predictor on Edge Devices
  ☆12Updated 4 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 4 years ago
• suchandler96 / gem5-NVDLA
  ☆36Updated 7 months ago
• CastLab-KAIST / OpenMDS
  ☆14Updated 2 years ago
• AlexMontgomerie / samo
  SAMO: Streaming Architecture Mapping Optimisation
  ☆34Updated 2 years ago
• awai54st / LUTNet
  ☆60Updated 5 years ago
• fpgasystems / FPGA-Recommendation-Accelerator
  MLSys 2021 paper: MicroRec: efficient recommendation inference by hardware and data structure solutions
  ☆18Updated 4 years ago
• UCLA-VAST / heterohalide
  HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration
  ☆15Updated 5 years ago
• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• gr-rahimi / APSim
  ☆22Updated 4 years ago
• fpga-opencl-benchmarks / rodinia_fpga
  Rodinia Benchmark Suite for OpenCL-based FPGAs
  ☆31Updated 2 years ago
• da-steve101 / binary_connect_cifar
  An implementation of a BinaryConnect network for cifar10
  ☆11Updated 6 years ago