ninfueng / high-level-synthesis-resourcesLinks
A collection of URLs related to High Level Synthesis (HLS).
☆12Updated 4 years ago
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- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 5 years ago
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Updated 7 years ago
- Low level design of a chip built for optimizing/accelerating CNN classifiers over gray scale images.☆12Updated 6 years ago
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- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Updated 4 years ago
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- A Fix-pointed Rudimentary CNN Convolution Accelerator☆15Updated 4 years ago
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- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 4 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆22Updated 3 years ago
- Repository for work on on Xilinx's matrix vector activation unit's RTL implementation. Documentation available at: https://asadalam.githu…☆16Updated 3 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
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- Designs for finalist teams of the DAC System Design Contest☆37Updated 4 years ago
- A Convolutional Neural Network (CNN) hardware accelerator for image recognition☆13Updated 5 years ago
- RISC-V ISA based 32-bit processor written in HLS☆17Updated 5 years ago
- The Verilog source code for DRUM approximate multiplier.☆31Updated 2 years ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆46Updated 8 months ago
- Systolic-array based Deep Learning Accelerator generator☆25Updated 4 years ago
- ☆8Updated 2 years ago
- This repository contains the hardware implementation for Static BFP convolution on FPGA☆10Updated 5 years ago
- An Synthesizable Deep Learning Library based on Xilinx High Level Synthesis(HLS) tool☆15Updated 8 years ago
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- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆46Updated 4 months ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆19Updated 5 years ago
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆37Updated 3 weeks ago
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- ☆16Updated 2 years ago