Alternatives and similar repositories for lin-analyzer

Users that are interested in lin-analyzer are comparing it to the libraries listed below

• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆81Updated 11 months ago
• template-hls / template-hls-float
  ☆29Updated 6 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆56Updated 3 months ago
• cornell-zhang / uptune
  A Generic Distributed Auto-Tuning Infrastructure
  ☆22Updated 3 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 3 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆93Updated 9 months ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 4 years ago
• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆51Updated 2 years ago
• Xilinx / merlin-compiler
  ☆58Updated last year
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago
• Accelergy-Project / timeloop-accelergy-tutorial
  Docker container with tools for the Timeloop/Accelergy tutorial
  ☆22Updated last year
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆129Updated 5 years ago
• sharc-lab / FlowGNN
  A dataflow architecture for universal graph neural network inference via multi-queue streaming.
  ☆73Updated 2 years ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆59Updated 9 months ago
• UCLA-VAST / soda-compiler
  Stencil with Optimized Dataflow Architecture Compiler
  ☆17Updated 5 years ago
• hst10 / pylog
  PyLog: An Algorithm-Centric FPGA Programming and Synthesis Flow
  ☆67Updated 2 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 3 years ago
• lana555 / dynamatic
  ☆86Updated last year
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆166Updated last year
• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• StanfordAHA / aha
  ☆59Updated this week
• UIUC-ChenLab / Nimblock
  ☆13Updated 2 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆92Updated last year
• harvard-acc / smaug
  SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin
  ☆111Updated 2 years ago
• sharc-lab / HLSFactory
  HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
  ☆38Updated this week
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆75Updated 6 years ago
• UCLA-VAST / AutoBridge
  [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
  ☆122Updated 2 years ago
• rapidstream-org / rapidstream-tapa
  RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.
  ☆173Updated this week
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆80Updated 6 years ago
• diwu1990 / UnarySim
  This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…
  ☆44Updated 2 years ago