pc2 / HPCC_FPGA
A OpenCL-based FPGA benchmark suite for HPC
☆32Updated last month
Alternatives and similar repositories for HPCC_FPGA:
Users that are interested in HPCC_FPGA are comparing it to the libraries listed below
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆19Updated last year
- FPGA version of Rodinia in HLS C/C++☆31Updated 4 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated 4 months ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)☆30Updated 8 months ago
- ☆12Updated 5 months ago
- A polyhedral compiler for hardware accelerators☆55Updated 5 months ago
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Updated 7 years ago
- FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters☆16Updated 3 years ago
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆38Updated last month
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆40Updated 4 years ago
- FPGA acceleration of arbitrary precision floating point computations.☆38Updated 2 years ago
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆38Updated 5 years ago
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆22Updated 3 months ago
- CGRA framework with vectorization support.☆21Updated this week
- DASS HLS Compiler☆27Updated last year
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆60Updated last year
- ☆27Updated 5 years ago
- Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…☆20Updated this week
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Updated 4 years ago
- A GPU acceleration flow for RTL simulation with batch stimulus☆99Updated 9 months ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆23Updated last month
- SForum 2020 : "A Run-time Hardware Routing Implementation for CGRA Overlays" code and data.☆11Updated 4 years ago
- A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…☆20Updated 6 months ago
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆20Updated last month
- Floating point modules for CHISEL☆30Updated 10 years ago
- Introductory examples for using PYNQ with Alveo☆49Updated last year
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆84Updated 3 months ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆50Updated 4 years ago
- ☆57Updated last year