☆69Jan 7, 2023Updated 3 years ago
Alternatives and similar repositories for aib-phy-hardware
Users that are interested in aib-phy-hardware are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Advanced Interface Bus (AIB) die-to-die hardware open source☆149Sep 23, 2024Updated last year
- ☆32Feb 20, 2024Updated 2 years ago
- AIB Generator: Analog hardware compiler for AIB PHY☆39Aug 22, 2020Updated 5 years ago
- Home of the Advanced Interface Bus (AIB) specification.☆62Aug 30, 2022Updated 3 years ago
- work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework☆40Nov 24, 2022Updated 3 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Filelist generator☆21Jun 23, 2026Updated last month
- An alternative PnR system, or at least an attempt to get it running on Ubuntu 18.04.☆10Aug 31, 2018Updated 7 years ago
- An Open Source Link Protocol and Controller☆29Jul 26, 2021Updated 4 years ago
- Open Source PHY v2☆36Apr 25, 2024Updated 2 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Oct 5, 2017Updated 8 years ago
- ☆15Oct 24, 2019Updated 6 years ago
- A framework for FPGA emulation of mixed-signal systems☆39Jul 28, 2021Updated 4 years ago
- Designs for Process-Voltage-Temperature (PVT) Sensors with MCU☆25May 8, 2020Updated 6 years ago
- Basic Common Modules☆48Jul 16, 2026Updated last week
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- gem5 repository to study chiplet-based systems☆91Apr 18, 2019Updated 7 years ago
- DUA, is a communication architecture that provides uniform access for FPGA to data center resources. Without being limited by machine bou…☆40Aug 30, 2022Updated 3 years ago
- ☆22Sep 26, 2025Updated 9 months ago
- FPU Generator☆20Jul 16, 2026Updated last week
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆38Apr 9, 2026Updated 3 months ago
- Repo to hold HammerBlade PyTorch port. Based on PyTorch v1.4.0☆14Oct 4, 2022Updated 3 years ago
- Verilog FPGA Parts Library. Old Octavo soft-CPU project.☆76Apr 2, 2019Updated 7 years ago
- An example OpenCAPI 3.0 FPGA reference design for accelerator endpoint development☆16Nov 7, 2022Updated 3 years ago
- Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, …☆260Updated this week
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Useful UVM extensions☆28Jul 10, 2024Updated 2 years ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆20Jan 5, 2023Updated 3 years ago
- A fault-injection framework using Chisel and FIRRTL☆39Sep 17, 2025Updated 10 months ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆73Jul 17, 2026Updated last week
- SmartNIC☆14Dec 13, 2018Updated 7 years ago
- Tile based architecture designed for computing efficiency, scalability and generality☆301Jun 16, 2026Updated last month
- Demo SoC for SiliconCompiler.☆64Jul 2, 2026Updated 3 weeks ago
- This is the Verilog 2005 parser used by VerilogCreator☆15May 19, 2019Updated 7 years ago
- The PE for the second generation CGRA (garnet).☆18Feb 22, 2026Updated 5 months ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- Xilinx ZynqMP AXI-ACP Adapter☆21May 18, 2026Updated 2 months ago
- ☆88Jan 7, 2023Updated 3 years ago
- Firmware infrastructure, contain RTOS Abstraction Layer, demos and more...☆55Nov 7, 2021Updated 4 years ago
- Groundhog - Serial ATA Host Bus Adapter☆23Jun 10, 2018Updated 8 years ago
- A small DNN library for RISC-V, using RISC-V Vector and Matrix extensions☆11Mar 13, 2025Updated last year
- Open Source Verification Bundle for VHDL and System Verilog☆48Jan 12, 2024Updated 2 years ago
- Test suite designed to check compliance with the SystemVerilog standard.☆381Updated this week