intel / rapid-design-methods-for-developing-hardware-accelerators
☆85Updated 2 years ago
Alternatives and similar repositories for rapid-design-methods-for-developing-hardware-accelerators:
Users that are interested in rapid-design-methods-for-developing-hardware-accelerators are comparing it to the libraries listed below
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated last month
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Updated 7 years ago
- Support for Rocket Chip on Zynq FPGAs☆40Updated 5 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆165Updated last year
- ☆67Updated 2 years ago
- ☆15Updated 4 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆52Updated 5 years ago
- Chisel components for FPGA projects☆121Updated last year
- openHMC - an open source Hybrid Memory Cube Controller☆47Updated 8 years ago
- OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology☆68Updated 6 months ago
- Tests for example Rocket Custom Coprocessors☆73Updated 5 years ago
- educational microarchitectures for risc-v isa☆66Updated 6 years ago
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆266Updated 4 months ago
- ☆87Updated last year
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆61Updated 2 years ago
- Project repo for the POSH on-chip network generator☆44Updated this week
- ☆78Updated last year
- A Style Guide for the Chisel Hardware Construction Language☆107Updated 3 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆101Updated last year
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆210Updated 5 years ago
- SoCRocket - Core Repository☆35Updated 8 years ago
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- The Shang high-level synthesis framework☆119Updated 10 years ago
- Advanced Interface Bus (AIB) die-to-die hardware open source☆133Updated 6 months ago
- Provides dot visualizations of chisel/firrtl circuits☆118Updated last year
- Connectal is a framework for software-driven hardware development.☆166Updated last year
- Next generation CGRA generator☆109Updated this week
- An example of using Ramulator as memory model in a cycle-accurate SystemC Design☆48Updated 7 years ago
- CVA6 SDK containing RISC-V tools and Buildroot☆63Updated 9 months ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 4 years ago