gem5 repository to study chiplet-based systems
☆87Apr 18, 2019Updated 6 years ago
Alternatives and similar repositories for gem5_chips
Users that are interested in gem5_chips are comparing it to the libraries listed below
Sorting:
- ☆38Jun 4, 2024Updated last year
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆75Jun 30, 2024Updated last year
- A list of our chiplet simulaters☆48Jun 22, 2025Updated 8 months ago
- A toolchain for rapid design space exploration of chiplet architectures☆75Jul 25, 2025Updated 7 months ago
- gem5-X open source project☆18Mar 28, 2023Updated 2 years ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆257Oct 6, 2022Updated 3 years ago
- Ratatoskr NoC Simulator☆29Apr 13, 2021Updated 4 years ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆29Feb 6, 2023Updated 3 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆114Jan 4, 2023Updated 3 years ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆23Aug 10, 2018Updated 7 years ago
- ☆14Feb 24, 2025Updated last year
- ☆14Feb 2, 2026Updated last month
- ☆68Jan 7, 2023Updated 3 years ago
- ☆68Jun 7, 2017Updated 8 years ago
- A comprehensive tool that allows for system-level performance estimation of chiplet-based In-Memory computing (IMC) architectures.☆23Jun 27, 2024Updated last year
- Network on Chip for MPSoC☆28Updated this week
- ☆27Aug 2, 2021Updated 4 years ago
- NoC simulation using gem5 (a simple tul)☆14Mar 23, 2024Updated last year
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago
- This adds partial support of AVX2 and AVX-512 to gem5.☆15Dec 19, 2023Updated 2 years ago
- ☆29Oct 20, 2019Updated 6 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Sep 3, 2021Updated 4 years ago
- ☆16Feb 5, 2024Updated 2 years ago
- An open-source UCIe implementation☆83Updated this week
- ☆109Feb 12, 2024Updated 2 years ago
- Deep learning accelerator for convolutional layer (convolution operation) and fully-connected layer(matrix-multiplication).☆20Nov 18, 2018Updated 7 years ago
- This repository contains the code for this paper: Chiplet-Gym: An RL-based Optimization Framework for Chiplet-based AI Accelerator☆22Sep 28, 2024Updated last year
- Network on Chip Simulator☆305Oct 26, 2025Updated 4 months ago
- STONNE Simulator integrated into SST Simulator☆22Apr 5, 2024Updated last year
- gem5 simulator with a gpgpu+graphics GPU model☆62Jun 27, 2020Updated 5 years ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48May 21, 2022Updated 3 years ago
- DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator☆451Aug 3, 2024Updated last year
- Repository to host and maintain SCALE-Sim code☆417Feb 2, 2026Updated last month
- ☆24Aug 9, 2022Updated 3 years ago
- a scaleable ring topology network on chip (NoC) implemented in BSV☆12Oct 14, 2014Updated 11 years ago
- STONNE: A Simulation Tool for Neural Networks Engines☆148Jun 16, 2025Updated 8 months ago
- ☆21May 14, 2025Updated 9 months ago
- Binary Single Precision Floating-point Fused Multiply-Add Unit Design (Verilog HDL)☆22Jul 8, 2013Updated 12 years ago
- A SystemC productivity library: https://minres.github.io/SystemC-Components/☆131Feb 25, 2026Updated last week