Alternatives and similar repositories for coriolis

Users that are interested in coriolis are comparing it to the libraries listed below

• litex-hub / litehyperbus
  Small footprint and configurable HyperBus core
  ☆13Updated 3 years ago
• YosysHQ / yosys-bench
  Benchmarks for Yosys development
  ☆24Updated 5 years ago
• m-labs / nmigen-stdio
  Industry standard I/O for nMigen
  ☆12Updated 5 years ago
• enjoy-digital / litesata_axiom
  ☆12Updated 4 years ago
• chipsalliance / f4pga-xc7-bram-patch
  Tool for updating the contents of BlockRAMs found in Xilinx 7 series bitstreams.
  ☆19Updated 3 years ago
• whitequark / icefloorplan
  iCE40 floorplan viewer
  ☆24Updated 7 years ago
• m-labs / nmigen-soc
  System on Chip toolkit for nMigen
  ☆19Updated 5 years ago
• wyvernSemi / usbModel
  USB virtual model in C++ for Verilog
  ☆31Updated 10 months ago
• YosysHQ / padring
  A padring generator for ASICs
  ☆25Updated 2 years ago
• asicsforthemasses / LunaPnR
  LunaPnR is a place and router for integrated circuits
  ☆47Updated last month
• daveshah1 / ElasticC
  lightweight open HLS for FPGA rapid prototyping
  ☆20Updated 7 years ago
• dh73 / A_Formal_Tale_Chapter_I_AMBA
  AXI Formal Verification IP
  ☆20Updated 4 years ago
• ArcaneNibble / KinglerPAR
  Next-Generation FPGA Place-and-Route
  ☆10Updated 7 years ago
• rbkettlewell / trollstigen-fpga
  Open source fpga project leveraging vtr CAD flow.
  ☆26Updated 2 years ago
• buttercutter / noc
  A simple spidergon network-on-chip with wormhole switching feature
  ☆12Updated 4 years ago
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 6 years ago
• phanrahan / mantle
  mantle library
  ☆44Updated 2 years ago
• ydnatag / nmigen-cocotb
  cocotb extension for nMigen
  ☆17Updated 3 years ago
• dbhi / vboard
  Virtual development board for HDL design
  ☆42Updated 2 years ago
• space-tudelft / cacd
  Space CACD
  ☆12Updated 5 years ago
• rodrigomelo9 / verifying-foss-hdl-synthesizers
  a project to check the FOSS synthesizers against vendors EDA tools
  ☆12Updated 4 years ago
• tmeissner / vhdl_verification
  Examples and design pattern for VHDL verification
  ☆15Updated 9 years ago
• The-OpenROAD-Project-Attic / Resizer
  ☆15Updated 5 years ago
• semify-eda / go.debug
  Ease the Life of Verification Engineers by helping them to analyze and understand failing simulation faster
  ☆11Updated 3 years ago
• dirjud / Nitro-Parts-lib-Xilinx
  This is mainly a simulation library of xilinx primitives that are verilator compatible.
  ☆33Updated last year
• hdl / packages
  Repo to help explain the different options users have for packaging.
  ☆17Updated 3 years ago
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• mcci-catena / catena-riscv32-fpga
  RISC-V 32-bit core for MCCI Catena 4710
  ☆10Updated 6 years ago
• antmicro / verilator-dynamic-scheduler-examples
  ☆23Updated 3 months ago
• efabless / sky130_sram_macros_old
  ☆38Updated 3 years ago